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MC74HC132ADTG View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
MC74HC132ADTG Quad 2-Input NAND Gate with Schmitt-Trigger Inputs High−Performance Silicon−Gate CMOS ON-Semiconductor
ON Semiconductor ON-Semiconductor
MC74HC132ADTG Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
MC74HC132A
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tPHL
Maximum Propagation Delay, Input A or B to Output Y
(Figures 3 and 4)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTLH,
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ tTHL
Maximum Output Transition Time, Any Output
(Figures 3 and 4)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Cin MaximumInputCapacitance
V *55_C to 25_C v85_C v125_C Unit
2.0
125
4.5
25
6.0
21
155
190
ns
31
38
26
32
2.0
75
4.5
15
6.0
13
95
110
ns
19
22
16
19
10
10
10
pF
Typical @ 25°C, VCC = 5.0 V
CPD Power Dissipation Capacitance (per Gate) (Note 8)
24
pF
8. Used to determine the noload dynamic power consumption: PD = CPD VCC2f + ICC VCC.
INPUT
A OR B
Y
tr
90%
50%
10%
tPHL
90%
50%
10%
tTHL
tf
VCC
GND
tPLH
tTLH
Figure 3. Switching Waveforms
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 4. Test Circuit
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