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M4-32/32-14JI View Datasheet(PDF) - Lattice Semiconductor

Part NameDescriptionManufacturer
M4-32/32-14JI High-performance E2CMOS in-system programmable logic, 5-V VCC, 32 macrocells, 32 I/Os, 12ns Lattice
Lattice Semiconductor Lattice
M4-32/32-14JI Datasheet PDF : 62 Pages
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CAPACITANCE 1
Parameter Symbol
CIN
CI/O
Parameter Description
Input capacitance
Output capacitance
Test Conditions
Typ
Unit
VIN=2.0 V
VOUT=2.0V
3.3 V or 5 V, 25°C, 1 MHz
6
pF
3.3 V or 5 V, 25°C, 1 MHz
8
pF
Note:
1. These parameters are not 100% tested, but are calculated at initial characterization and at any time the design is modified
where this parameter may be affected.
ICC vs. FREQUENCY
These curves represent the typical power consumption for a particular device at system
frequency. The selected “typical” pattern is a 16-bit up-down counter. This pattern fills the
device and exercises every macrocell. Maximum frequency shown uses internal feedback and
a D-type register. Power/Speed are optimized to obtain the highest counter frequency and the
lowest power. The highest frequency (LSBs) is placed in common PAL blocks, which are set to
high power. The lowest frequency signals (MSBs) are placed in a common PAL block and set to
lowest power.
350
VCC = 5 V or 3.3 V, TA = 25 °C
M4(LV)-256/128
300
250
M4(LV)-192/96
200
M4(LV)-128/64
150
M4(LV)-96/48
100
M4(LV)-64/32
M4(LV)-32/32
50
0
Frequency (MHz)
Figure 19. ICC Curves at High Power Mode
17466G-066
17466G-044
46
MACH 4 Family
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