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|Description||High-performance E2CMOS in-system programmable logic, 5-V VCC, 32 macrocells, 32 I/Os, 12ns|
|M4-32/32-14JI Datasheet PDF : 62 Pages |
A reset/preset swapping feature in each macrocell allows for reset and preset to be exchanged,
providing ﬂexibility. In asynchronous mode (Figure 8), a single individual product term is
provided for initialization. It can be selected to control reset or preset.
Figure 8. Asynchronous Mode Initialization Conﬁgurations
Note that the reset/preset swapping selection feature effects power-up reset as well. The
initialization functionality of the ﬂip-ﬂops is illustrated in Table 13. The macrocell sends its data
to the output switch matrix and the input switch matrix. The output switch matrix can route this
data to an output if so desired. The input switch matrix can send the signal back to the central
switch matrix as feedback.
Table 13. Asynchronous Reset/Preset Operation
See Table 12
1. Transparent latch is unaffected by AR, AP
Output Switch Matrix
The output switch matrix allows macrocells to be connected to any of several I/O cells within a
PAL block. This provides high ﬂexibility in determining pinout and allows design changes to
occur without effecting pinout.
In MACH 4 and MACH 4A devices with 2:1 Macrocell-I/O cell ratio, each PAL block has twice as
many macrocells as I/O cells. The MACH 4 output switch matrix allows for half of the macrocells
to drive I/O cells within a PAL block, in combinations according to Figure 9. Each I/O cell can
choose from eight macrocells; each macrocell has a choice of four I/O cells. The MACH 4 and
MACH 4A devices with 1:1 Macrocell-I/O cell ratio allow each macrocell to drive one of eight I/
O cells (Figure 9).
MACH 4 Family
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