AD9144BCPAZRL View Datasheet(PDF) - Analog Devices
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AD9144BCPAZRL Datasheet PDF : 125 Pages
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AD9144
Data Sheet
Table 46. Single-Link JESD204B Operating Modes
Parameter
M (Converter Count)
L (Lane Count)
S (Samples per Converter per Frame)
F (Octets per Frame, per Lane)
K1 (Frames per Multiframe)
HD (High Density)
N (Converter Resolution)
NP (Bits per Sample)
Example Clocks for 10 Gbps Lane Rate
PClock Rate (MHz)
Frame Clock Rate (MHz)
Data Rate (MHz)
0
1
2
4
4
4
8
8
4
1
2
1
1
2
2
32
16/32 16/32
1
0
0
16
16
16
16
16
16
250 250 250
1000 500 500
1000 1000 500
1 K must be 32 in Mode 0, Mode 4, and Mode 9. K can be 16 or 32 in all other modes.
3
4
2
1
4
16/32
0
16
16
250
250
250
Mode
4
5
2
2
4
4
1
2
1
2
32
16/32
1
0
16
16
16
16
250
1000
1000
250
500
1000
6
2
2
1
2
16/32
0
16
16
250
500
500
7
2
1
1
4
16/32
0
16
16
250
250
250
9
1
2
1
1
32
1
16
16
250
1000
1000
10
1
1
1
2
16/32
0
16
16
250
500
500
Table 47. Dual-Link JESD204B Operating Modes for Link 0 and Link 1
Parameter
M (Converter Count)
L (Lane Count)
S (Samples per Converter per Frame)
F (Octets per Frame per Lane)
K1 (Frames per Multiframe)
HD (High Density)
N (Converter Resolution)
NP (Bits per Sample)
Example Clocks for 10 Gbps Lane Rate
PClock Rate (MHz)
Frame Clock Rate (MHz)
Data Rate (MHz)
4
2
4
1
1
32
1
16
16
250
1000
1000
1 K must be 32 in Mode 4 and Mode 9. K can be 16 or 32 in all other modes.
5
2
4
2
2
16/32
0
16
16
250
500
1000
Mode
6
2
2
1
2
16/32
0
16
16
7
2
1
1
4
16/32
0
16
16
250
250
500
250
500
250
9
1
2
1
1
32
1
16
16
250
1000
1000
10
1
1
1
2
16/32
0
16
16
250
500
500
Rev. B | Page 48 of 125
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