Data Sheet
AD9144
Figure 22. 4C WCDMA ACLR, fOUT = 30 MHz,
fDAC = 983 MHz, 2× Interpolation, PLL Frequency = 122 MHz
Figure 23. 4C WCDMA ACLR, fOUT = 122 MHz,
fDAC = 983 MHz, 2× Interpolation, PLL Frequency = 122 MHz
Figure 24. 4C WCDMA ACLR, fOUT = 30 MHz,
fDAC = 1966 MHz, 4× Interpolation, PLL Frequency = 245 MHz
Figure 25. 4C WCDMA ACLR, fOUT = 245 MHz,
fDAC = 1966 MHz, 4× Interpolation, PLL Frequency = 245 MHz
1800
1×
2×
1700
4×
8×
1600
1500
1400
1300
1200
1100
1000
0
500
1000
1500
2000
2500
fDAC (MHz)
Figure 26. Total Power Consumption vs. fDAC over Interpolation, 8 SERDES Lanes
Enabled, 4 DACs Enabled, NCO, Digital Gain, Inverse Sinc and DAC PLL Disabled
120
NCO
PLL (fDAC/fREF RATIO:4)
100
DIGITAL GAIN
INVERSE SINC
80
60
40
20
0
200
400
600
800 1000 1200 1400 1600
fDAC (MHz)
Figure 27. Power Consumption vs. fDAC over Digital Functions
Rev. B | Page 19 of 125