HA4-5020/883 View Datasheet(PDF) - Intersil
Part Name
Description
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HA4-5020/883 Datasheet PDF : 19 Pages
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HA-5020/883
Packaging (Continued)
D
D3
j x 45o
B
h x 45o
L
E3 E
A A1
PLANE 2
PLANE 1
e
L3
E1
E2
e1
L2
B2
D2
D1
B1
B3
L1
J20.A MIL-STD-1835 CQCC1-N20 (C-2)
20 PAD METAL SEAL LEADLESS CERAMIC CHIP CARRIER
INCHES
MILLIMETERS
SYMBOL
A
MIN
0.060
MAX
0.100
MIN
1.52
MAX
2.54
NOTES
6, 7
A1
0.050
0.088
1.27
2.23
7
B
-
-
-
-
4
B1
0.022
0.028
0.56
0.71
2, 4
B2
0.072 REF
1.83 REF
-
B3
0.006
0.022
0.15
0.56
-
D
0.342
0.358
8.69
9.09
-
D1
0.200 BSC
D2
0.100 BSC
5.08 BSC
-
2.54 BSC
-
D3
-
0.358
-
9.09
2
E
0.342
0.358
8.69
9.09
-
E1
0.200 BSC
E2
0.100 BSC
5.08 BSC
-
2.54 BSC
-
E3
-
0.358
-
9.09
2
e
0.050 BSC
1.27 BSC
-
e1
0.015
-
0.38
-
2
h
0.040 REF
1.02 REF
5
j
0.020 REF
0.51 REF
5
L
0.045
0.055
1.14
1.40
-
L1
0.045
0.055
1.14
1.40
-
L2
0.075
0.095
1.90
2.41
-
L3
0.003
0.015
0.08
0.38
-
ND
5
5
3
NE
5
N
20
5
3
20
3
NOTES:
1. Metallized castellations shall be connected to plane 1 terminals
and extend toward plane 2 across at least two layers of ceramic
or completely across all of the ceramic layers to make electrical
connection with the optional plane 2 terminals.
2. Unless otherwise specified, a minimum clearance of 0.015 inch
(0.381mm) shall be maintained between all metallized features
(e.g., lid, castellations, terminals, thermal pads, etc.)
3. Symbol “N” is the maximum number of terminals. Symbols “ND”
and “NE” are the number of terminals along the sides of length
“D” and “E”, respectively.
4. The required plane 1 terminals and optional plane 2 terminals
shall be electrically connected.
5. The corner shape (square, notch, radius, etc.) may vary at the
manufacturer’s option, from that shown on the drawing.
6. Chip carriers shall be constructed of a minimum of two ceramic
layers.
7. Maximum limits allows for 0.007 inch solder thickness on pads.
8. Lead Finish: Type A.
9. Materials: Compliant to MIL-M-38510.
3-105
Spec Number 511080-883
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