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YGV619 View Datasheet(PDF) - LSI Corporation

Part Name
Description
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YGV619
LSI
LSI Corporation  LSI
YGV619 Datasheet PDF : 15 Pages
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YGV619
l RAS (O)
Outputs row address strobe signal for SDRAM.
When two 16 bit SDRAMs are used, connect this pin to both SDRAMs.
l CAS (O)
Outputs column address strobe signal for SDRAM.
When two 16 bit SDRAMs are used, connect this pin to both SDRAMs.
l WE (O)
Outputs write strobe signal for SDRAM.
When two SDRAMs are used, connect this pin to both SDRAMs.
l DQM3-0 (O)
Outputs data mask signal for SDRAM. DQM3, DQM2, DQM1 and DQM0 are mask control signals for SDQ31-24,
SDQ23-16, SDQ15-8 and SDQ7-0 respectively. When masking the data, corresponding DQM pin outputs high level
signal.
When one 16 bit SDRAM is used, DQM3-2 pins are not used, thus they are to be kept open.
l SDCLK (I/O)
Outputs CLK for SDRAM. SDCLK inputs the clock once outputted from this pin to use it as fetch clock to obtain
setup time at SDQ input.
< Display monitor interface >
l R, G, B (O: analog output)
Outputs linear RGB signal. Termination resistor of 37.5is connected to this pin to make the resolution of output
voltage amplitude 8 bits. Monitor with impedance of 75can be driven directly through this interface as shown below.
R(G,B)
RL=75
RL=75
l REXT (I: analog input)
A resistor is connected between this pin and GND(AVSS4) for adjusting the amplitude of signal outputted from DAC
for RGB. The standard amplitude of signal outputted from DAC is 0.7 V (rREXT=470 ). The amplitude of the output
can be adjusted finely within around ±100by using the following formula.
Vp_p = 470 × 0.7 / rREXT
l CSYNC (O)
Outputs composite sync signal for external monitor. In interlaced scanning mode, equalizing pulses are added to this
signal. This pin can output VSYNC by using internal register setting.
l HSYNC (O)
Outputs horizontal sync signal for external monitor.
l BLANK (O)
Outputs a signal that indicates effective display period when LCD panel is connected to the device.
l AT1-0 (O)
AT1-0 bits of display data are outputted from these pins.
l FSC (O)
Outputs subcarrier clock for video encoder. The subcarrier clock is created by dividing the clock inputted to DCKIN
pin by 1, 2, 4, or 8, which is determined by register setting. For example, inputting 14.318 MHz to DCKIN pin and
dividing it by “4” give subcarrier clock of 3.58 MHz.
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