MX25L12855E
the GPIO function is enabled, or the GPIORST instruction will not be executed.
The sequence of issuing GPIORST instruction is: CS# goes low -> GPIORST instruction code is sent -> CS# goes
high.
The CS# must go high exactly at the byte boundary; otherwise, the instruction will be rejected and not executed.
GPIO register definition is as follows:
Register
Name D[6:0]
GPDC[6:0]
GPOM[6:0]
GPWD[6:0]
GPST[6:0]
GPPU[6:0]
GPPD[6:0]
GPDS[6:0]
GPRD[6:0]
GPII[6:0]
GPOI[6:0]
GPOS[6:0]
Reg. Address
A[6:0]
0x00
Description
GPIO Pin Direction
Configuration
0:Configured as input pin
1: Configured as output pin
0: Open drain
Reg. Value after
POR/GPIO reset
0000000
0x01
GPIO Pin Output Mode 1:Push-pull
0000000
Valid only when GPDC[n]=1
0: Data="0"
0x02
GPIO Pin Write Data 1: Data="1"
0000000
0x03
0x04
0x05
0x06
0x07
0x08
0x09
GPIO Pin Smitt
It's only valid for output pins.
0: Disable
Trigger enable
GPIO Pin pull-up
1: Enable
0: Disable
resistor enable
GPIO Pin pull-down
1: ~50K Ω to VDD
0: Disable
resistor enable
GPIO Pin Driving
1: ~50K Ω to GND
0: 2mA (weak)
Strength
1: 4mA (strong)
GPIO Pin Read Data
0: data="0"
1: data="1"
GPIO Pin Input Inversion
0: No inversion
1: Inversion enable
0: No inversion
GPIO Pin Output Inversion
1: Inversion enable
0 : Disable
0000000
0000000
0000000
0000000
0000000
0000000
0000000
0x0C
GPIO one shot enable
1 : Enable
(When pin value is "1", keep "1"
0000000
until GPRD[n] is written "1")
P/N: PM1466
REV. 0.05, MAR. 05, 2009
31