LXE1710EVALKIT View Datasheet(PDF) - Microsemi Corporation
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LXE1710EVALKIT Datasheet PDF : 18 Pages
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LXE1710 EVALUATION BOARD
USER GUIDE
100
50
20
10
2
1
0.26978
0.1
0.04675
0.01
0.005
0.001
50m
Gate Resistor Impact On THD+N
No Gate Resistor
W ith 10Ω Gate Resistor
100m
200m
500m
11 . 1 3 1
2
Output Power (W )
5
10
VIN = 15V
fIN = 1kHz
RL
20 24.56 30
GATE RESISTOR
Series resistors (R6, R10, R11, R12) can be added to
the gate of MOSFETs (Q1 to Q4) to control the
switching transition times. This reduces signal
distortion as seen in the THD+N vs. Output Power
graph below. The slower switching speeds will
however, increase power dissipation and therefore
slightly decrease the overall efficiency of the amplifier.
VIN
and valley voltages, and the charge and discharge
currents are proportional to the supply voltage. This
keeps the frequency relatively constant while keeping
the slope of the PWM ramp proportional to the voltage
on the VDD pin. For operating frequencies other than
333kHz, the frequency can be approximated by the
following equation:
Frequency =
1
(0.577)(RPWM )(CPWM ) + 320ns
R12
P+
10 Ω
R11
N+
10 Ω
Q1
OUT+
Q2
- 3451 . 1 $
resistors, which improves (decreases) the THD+N
from 0.1% to 0.05% with a slight impact on efficiency
of approximately 2%. The recommended gate resistor
1 6!
OSCILLATOR CONFIGURATION
The oscillator is programmed by the external timing
components RPWM and CPWM. For a nominal
frequency of 333kHz, RPWM and CPWM should be
set to 49.9kOhms and 100pF respectively. Note that
in order to keep the slope of the PWM ramp voltage
proportional to the supply voltage, both the ramp peak
MULTI CHANNEL REQUIREMENTS AND FREQUENCY
SYNCHRONIZATION
For applications that require more than a single
channel, the oscillators of multiple LX1710/1711
controllers can be configured for synchronous
operation. One unit, the master, is programmed for
the desired frequency with the RPWM and CPWM as
usual. Additional units will be slave units, and their
oscillators will be disabled by leaving the RPWM pin
disconnected. The CLOCK pin and the CPWM pin of
the slave units should be tied to the CLOCK pin and
the CPWM pin of the master unit respectively. In this
configuration, the CLOCK pins of the slave units begin
receiving instead of transmitting clock pulses. Also,
the CPWM pins quit driving the PWM capacitor in the
slave units. Note that for optimum performance, all
slave units should be located within a few inches of the
master unit.
Copyright © 2000
Rev. 1.1, 2000-12-01
Microsemi
Linfinity Microelectronics Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
Page 14
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