ADV7127KRU140 View Datasheet(PDF) - Analog Devices
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ADV7127KRU140 Datasheet PDF : 16 Pages
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ADV7127–SPECIFICATIONS
5 V/3.3 V DYNAMIC SPECIFICATIONS (VAA = (3 V–5.25 V)1, VREF = 1.235 V, RSET = 560 ⍀, CL = 10 pF. All specifications
are for TA = +25؇C unless otherwise noted, TJ MAX = 110؇C)
Parameter
Min
Typ
Max
Units
DAC PERFORMANCE
Glitch Impulse2, 3
Data Feedthrough2, 3
Clock Feedthrough2, 3
10
pVs
22
dB
33
dB
NOTES
1These max/min specifications are guaranteed by characterization.
2TTL input values are for 0 V and 3 V with input rise/fall times ≤3 ns, measured at the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
3Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
Specifications subject to change without notice.
5 V TIMING SPECIFICATIONS1 (VAA = +5 V ؎ 5%2, VREF = 1.235 V, RSET = 560 ⍀, CL = 10 pF. All specifications TMINto TMAX3
unless otherwise noted, TJ MAX = 110؇C)
Parameter
Min
Typ
Max
Units
Condition
ANALOG OUTPUTS
Analog Output Delay, t6
Analog Output Rise/Fall Time, t74
Analog Output Transition Time, t85
Analog Output Skew, t96
5.5
ns
1.0
ns
15
ns
1
2
ns
CLOCK CONTROL
fCLK7
fCLK7
fCLK7
Data and Control Setup, t1
Data and Control Hold, t2
Clock Pulsewidth High, t4
Clock Pulsewidth Low t5
Clock Pulsewidth High t4
Clock Pulsewidth Low t5
Clock Pulsewidth High t4
Clock Pulsewidth Low t5
Pipeline Delay, tPD6
PSAVE Up Time, t106
PDOWN Up Time, t118
0.5
50
0.5
140
0.5
240
1.5
2.5
1.875
1.1
1.875
1.25
2.85
2.85
8.0
8.0
1.0
1.0
1.0
2
10
320
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
ns
ns
50 MHz Grade
140 MHz Grade
240 MHz Grade
fMAX = 240 MHz
fMAX = 240 MHz
fMAX = 140 MHz
fMAX = 140 MHz
fMAX = 50 MHz
fMAX = 50 MHz
NOTES
1Timing specifications are measured with input levels of 3.0 V (VIH) and 0 V (VIL) 0 for both 5 V and 3.3 V supplies.
2These maximum and minimum specifications are guaranteed over this range.
3Temperature range: TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
4Rise time was measured from the 10% to 90% point of zero to full-scale transition, fall time from the 90% to 10% point of a full-scale transition.
5Measured from 50% point of full-scale transition to 2% of final value.
6Guaranteed by characterization.
7fCLK max specification production tested at 125 MHz and 5 V. Limits specified here are guaranteed by characterization.
8This power-down feature is only available on the ADV7127 in the TSSOP package.
Specifications subject to change without notice.
–6–
REV. 0
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