ADV7127KR140 View Datasheet(PDF) - Analog Devices
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ADV7127KR140 Datasheet PDF : 16 Pages
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ADV7127–SPECIFICATIONS
3.3 V SOIC SPECIFICATIONS1
(VAA
=
+3.0
V–3.6
V,
VREF
=
1.235
V,
RSET
=
560
⍀,
CL
=
10
pF.
All
specifications
TMIN
to
T
2
MAX
unless otherwise noted, TJ MAX = 110؇C)
Parameter
Min Typ Max
Units
Test Conditions
STATIC PERFORMANCE
Resolution (Each DAC)
Integral Nonlinearity (BSL)
Differential Nonlinearity
10
–1
0.5
+1
–1
0.25 +1
DIGITAL AND CONTROL INPUTS
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current, IIN
PSAVE Pull-Up Current
2.0
0.8
–1
+1
20
Input Capacitance, CIN
10
ANALOG OUTPUTS
Output Current
Output Compliance Range, VOC
Output Impedance, ROUT
Output Capacitance, COUT
Offset Error
Gain Error3
2.0
18.5
0
+1.4
70
10
0
0
0
Bits
LSB
LSB
V
V
µA
µA
pF
mA
V
kΩ
pF
% FSR
% FSR
RSET = 680 Ω
RSET = 680 Ω
RSET = 680 Ω
VIN = 0.0 V or VDD
Tested with DAC Output = 0 V
FSR = 17.62 mA
VOLTAGE REFERENCE (Ext.)
Reference Range, VREF
POWER DISSIPATION
Digital Supply Current4
Digital Supply Current4
Digital Supply Current4
Analog Supply Current
Analog Supply Current
Standby Supply Current
Power Supply Rejection Ratio
1.12
1.235 1.35
2.2
5.0
6.5
12.0
11
15
32
35
5
2.4
5.0
0.1
0.5
V
mA
mA
mA
mA
mA
mA
%/%
fCLK = 50 MHz
fCLK = 140 MHz
fCLK = 240 MHz
RSET = 560 Ω
RSET = 4933 Ω
PSAVE = Low, Digital and Control
Inputs at VDD
NOTES
1These max/min specifications are guaranteed by characterization to be over 3.0 V to 3.6 V range.
2Temperature range TMIN to TMAX: –40°C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz.
3Gain error = ((Measured (FSC)/Ideal (FSC) –1) × 100) , where Ideal = VREF /RSET × K × (3FFH) and K = 7.9896.
4Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V DD.
Specifications subject to change without notice.
–4–
REV. 0
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