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ADV601JS View Datasheet(PDF) - Analog Devices

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Description
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ADV601JS
ADI
Analog Devices ADI
ADV601JS Datasheet PDF : 52 Pages
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a
Low Cost
Multiformat Video Codec
ADV601
FEATURES
Precise Compressed Bit Rate Control
Field Independent Compression
Flexible Video Interface Supports All Common
Formats, Including CCIR-656
General Purpose 8-, 16- or 32-Bit Host Interface With
512 Deep 32-Bit FIFO
PERFORMANCE
Real-Time Compression Or Decompression of CCIR-601
And Square Pixel Video:
720 ؋ 288 @ 50 Fields/Sec — PAL
768 ؋ 288 @ 50 Fields/Sec — PAL
720 ؋ 243 @ 60 Fields/Sec — NTSC
640 ؋ 243 @ 60 Fields/Sec — NTSC
Compression Ratios from Visually Loss-Less To 350:1
Visually Loss-Less Compression At 4:1 on Natural
Images (Typical)
APPLICATIONS
Nonlinear Video Editing
Video Capture Systems
Remote CCTV Surveillance
Digital Camcorders
Broadcast Quality Video Distribution Systems
Video Insertion Equipment
Image And Video Archival Systems
Digital Video Tape
High Quality Video Teleconferencing
GENERAL DESCRIPTION
The ADV601 is a very low cost, single chip, dedicated function,
all digital CMOS VLSI device capable of supporting visually
loss-less to 350:1 real-time compression and decompression of
CCIR-601 digital video at very high image quality levels. The
chip integrates glueless video and host interfaces with on-chip
SRAM to permit low part count, system level implementations
suitable for a broad range of applications.
The ADV601 is a video encoder/decoder optimized for real-time
compression and decompression of interlaced digital video. All
features of the ADV601 are designed to yield high performance
at a breakthrough systems-level cost. Additionally, the unique
sub-band coding architecture of the ADV601 offers you many
application-specific advantages. A review of the General Theory
of Operation and Applying the ADV601 sections will help you
get the most use out of the ADV601 in any given application.
The ADV601 accepts component digital video through the
Video Interface and outputs a compressed bit stream though the
Host Interface in Encode Mode. While in Decode Mode, the
ADV601 accepts a compressed bit stream through the Host
Interface and outputs component digital video through the
Video Interface. The host accesses all of the ADV601’s control
and status registers using the Host Interface. An optional Digital
Signal Processor (DSP) may be used for calculating quantiza-
tion Bin Widths (BW) (instead of the host); the ADV601 sends
current field statistics and receives Bin Width results as a packet
I/O over the DSP serial port interface. A generic fixed-point DSP
(for instance the ADSP-2105) is more than adequate for these
calculations. Figure 1 summarizes the basic function of the part.
FUNCTIONAL BLOCK DIAGRAM
(continued on page 2)
256K X 16-BIT DRAM
(FIELD STORE)
DSP
(OPTIONAL)
DIGITAL
COMPONENT
VIDEO I/O
DIGITAL
VIDEO I/O
PORT
DRAM
MANAGER
WAVELET
FILTERS,
DECIMATOR, &
INTERPOLATOR
SERIAL
PORT
ADAPTIVE
QUANTIZER
ADV601
LOW COST, MULTIFORMAT
VIDEO CODEC
RUN
LENGTH
CODER
HUFFMAN
CODER
HOST
I/O PORT
& FIFO
HOST
ON-CHIP
TRANSFORM
BUFFER
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
 

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