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ADF4106BRUZ-R7 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
ADF4106BRUZ-R7
ADI
Analog Devices ADI
ADF4106BRUZ-R7 Datasheet PDF : 24 Pages
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Data Sheet
ADF4106
SPECIFICATIONS
AVDD = DVDD = 3 V ± 10%, AVDD ≤ VP ≤ 5.5 V, AGND = DGND = CPGND = 0 V, RSET = 5.1 kΩ, dBm referred to 50 Ω, TA = TMAX to TMIN,
unless otherwise noted.
Table 1.
Parameter
RF CHARACTERISTICS
RF Input Frequency (RFIN)
RF Input Sensitivity
Maximum Allowable Prescaler
Output Frequency3
REFIN CHARACTERISTICS
REFIN Input Frequency
REFIN Input Sensitivity4
REFIN Input Capacitance
REFIN Input Current
PHASE DETECTOR
Phase Detector Frequency6
CHARGE PUMP
ICP Sink/Source
High Value
Low Value
Absolute Accuracy
RSET Range
ICP Three-State Leakage
Sink and Source Current Matching
B Version1 B Chips2 (typ) Unit
0.5/6.0
–10/0
300
0.5/6.0
–10/0
300
GHz min/max
dBm min/max
MHz max
Test Conditions/Comments
See Figure 18 for input circuit
For lower frequencies, ensure
slew rate (SR) > 320 V/μs
P=8
325
325
MHz max
P = 16
20/300
0.8/VDD
10
±100
20/300
0.8/VDD
10
±100
MHz min/max
V p-p min/max
pF max
μA max
For f < 20 MHz, ensure SR > 50 V/μs
Biased at AVDD/2 (see Note 55)
104
104
MHz max
ABP = 0, 0 (2.9 ns antibacklash pulse width)
Programmable, see Table 9
5
625
2.5
3.0/11
2
2
5
625
2.5
3.0/11
2
2
mA typ
μA typ
% typ
kΩ typ
nA max
% typ
With RSET = 5.1 kΩ
With RSET = 5.1 kΩ
See Table 9
1 nA typical; TA = 25°C
0.5 V ≤ VCP ≤ VP − 0.5 V
ICP vs. VCP
ICP vs. Temperature
LOGIC INPUTS
VIH, Input High Voltage
VIL, Input Low Voltage
IINH, IINL, Input Current
CIN, Input Capacitance
LOGIC OUTPUTS
VOH, Output High Voltage
VOH, Output High Voltage
IOH
VOL, Output Low Voltage
POWER SUPPLIES
AVDD
DVDD
VP
IDD7 (AIDD + DIDD)
IDD8 (AIDD + DIDD)
IDD9 (AIDD + DIDD)
IP
Power-Down Mode10
(AIDD + DIDD)
1.5
2
1.4
0.6
±1
10
1.4
VDD − 0.4
100
0.4
2.7/3.3
AVDD
AVDD/5.5
11
11.5
13
0.4
10
1.5
2
1.4
0.6
±1
10
1.4
VDD − 0.4
100
0.4
2.7/3.3
AVDD
AVDD/5.5
9.0
9.5
10.5
0.4
10
% typ
% typ
V min
V max
μA max
pF max
V min
V min
μA max
V max
V min/V max
V min/V max
mA max
mA max
mA max
mA max
μA typ
0.5 V ≤ VCP ≤ VP − 0.5 V
VCP = VP/2
Open-drain output chosen, 1 kΩ pull-up
resistor to 1.8 V
CMOS output chosen
IOL = 500 μA
AVDD ≤ VP ≤ 5.5V
9.0 mA typ
9.5 mA typ
10.5 mA typ
TA = 25°C
Rev. E | Page 3 of 24
 

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