ADF4001BRU View Datasheet(PDF) - Analog Devices
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ADF4001BRU Datasheet PDF : 17 Pages
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ADF4001
Table VI. Initialization Latch Map
RESERVED
CURRENT
SETTING
2
CURRENT
SETTING
1
TIMER COUNTER
CONTROL
MUXOUT
CONTROL
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
X
X PD2 CPI6 CPI5 CPI4 CPI3 CPI2 CPI1 TC4 TC3 TC2 TC1 F5
X = DON’T CARE
F4 F3
F2 M3 M2 M1 PD1 F1 C2 (1) C1 (1)
PHASE DETECTOR
F2 POLARITY
0 NEGATIVE
1 POSITIVE
F3
CHARGE PUMP OUTPUT
0
NORMAL
1
THREE-STATE
F4
F5
FASTLOCK MODE
0
X
FASTLOCK DISABLED
1
0
FASTLOCK MODE 1
1
1
FASTLOCK MODE 2
COUNTER
F1 OPERATION
0 NORMAL
1 R, N COUNTER
HELD IN RESET
CPI6
CPI3
0
0
0
0
1
1
1
1
TC4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
CPI5
CPI2
0
0
1
1
0
0
1
1
TC3
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CP14
CPI1
0
1
0
1
0
1
0
1
TIMEOUT
TC2
TC1
(PFD CYCLES)
0
0
3
0
1
7
1
0
11
1
1
15
0
0
19
0
1
23
1
0
27
1
1
31
0
0
35
0
1
39
1
0
43
1
1
47
0
0
51
0
1
55
1
0
59
1
1
63
2.7k⍀
1.088
2.176
3.264
4.352
5.44
6.528
7.616
8.704
ICP (mA)
4.7k⍀
0.625
1.25
1.875
2.5
3.125
3.75
4.375
5.0
10k⍀
0.294
0.588
0.882
1.176
1.47
1.764
2.058
2.352
CE PIN PD2
0
X
1
X
1
0
1
1
PD1
X
0
1
1
MODE
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
M3
M2
M1
OU TPUT
0
0
0
THREE-STATE OUTPUT
0
0
1
DIGITAL LOCK DETECT
0
1
0
N DIVIDER OUTPUT
0
1
1
AVDD
1
0
0
R DIVIDER OUTPUT
1
0
1
N-CHANNEL OPEN-DRAIN
LOCK DETECT
1
1
0
SERIAL DATA OUTPUT
1
1
1
DGND
REV. B
–11–
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