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ADE7755 View Datasheet(PDF) - Analog Devices

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ADE7755 Datasheet PDF : 20 Pages
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ADE7755
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DVDD 1
AC/DC 2
AVDD 3
NC 4
V1P 5
V1N 6
V2N 7
V2P 8
RESET 9
REFIN/OUT 10
AGND 11
SCF 12
ADE7755
TOP VIEW
(Not to Scale)
24 F1
23 F2
22 CF
21 DGND
20 REVP
19 NC
18 CLKOUT
17 CLKIN
16 G0
15 G1
14 S0
13 S1
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1
DVDD
Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7755. The supply
voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 μF
capacitor in parallel with a ceramic 100 nF capacitor.
2
AC/DC
High-Pass Filter Select. This logic input is used to enable the HPF in Channel 1 (current channel). A Logic 1 on
this pin enables the HPF. The associated phase response of this filter is internally compensated over a
frequency range of 45 Hz to 1 kHz. The HPF should be enabled in power metering applications.
3
AVDD
Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the ADE7755. The supply
should be maintained at 5 V ± 5% for specified operation. Every effort should be made to minimize power
supply ripple and noise at this pin by the use of proper decoupling. This pin should be decoupled to AGND
with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
4, 19
NC
No Connect.
5, 6
V1P, V1N
Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum differential signal level of ±470 mV for specified operation. Channel 1 also has a PGA, and the gain
selections are outlined in Table 5. The maximum signal level at these pins is ±1 V with respect to AGND. Both
inputs have internal ESD protection circuitry. An overvoltage of ±6 V can be sustained on these inputs without
risk of permanent damage.
7, 8
V2N, V2P
Negative and Positive Inputs for Channel 2 (Voltage Channel). These inputs provide a fully differential input pair
with a maximum differential input voltage of ±660 mV for specified operation. The maximum signal level at
these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage
of ±6 V can be sustained on these inputs without risk of permanent damage.
9
RESET
Reset Pin. A logic low on this pin holds the ADCs and digital circuitry in a reset condition.
Bringing this pin logic low clears the ADE7755 internal registers.
10
REFIN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source may also be
connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor and
a 100 nF ceramic capacitor.
11
AGND
This pin provides the ground reference for the analog circuitry in the ADE7755, that is, the ADCs and reference.
This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference
for all analog circuitry, for example, antialiasing filters and current and voltage transducers. For good noise
suppression, the analog ground plane should be connected to the digital ground plane at one point only. A
star ground configuration helps to keep noisy digital currents away from the analog circuits.
12
SCF
Select Calibration Frequency. This logic input is used to select the frequency on the calibration output, CF.
Table 8 shows how the calibration frequencies are selected.
13, 14
S1, S0
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
This offers the designer greater flexibility when designing the energy meter. See the Selecting a Frequency for
an Energy Meter Application section.
15, 16
G1, G0
These logic inputs are used to select one of four possible gains for Channel 1, that is, V1. The possible gains
are 1, 2, 8, and 16. See the Analog Inputs section.
Rev. A | Page 6 of 20
 

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