datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD5424 View Datasheet(PDF) - Unspecified

Part Name
Description
View to exact match
AD5424 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
PRELIMINARY TECHNICAL DATA
AD5424/AD5433/AD5445
TERMINOLOGY
Relative Accuracy
Relative accuracy or endpoint nonlinearity is a measure of
the maximum deviation from a straight line passing
through the endpoints of the DAC transfer function. It is
measured after adjusting for zero and full scale and is
normally expressed in LSBs or as a percentage of full scale
reading.
Differential Nonlinearity
Differential nonlinearity is the difference between the
measured change and the ideal 1 LSB change between any
two adjacent codes. A specified differential nonlinearity of
±1 LSB max over the operating temperature range ensures
monotonicity.
Gain Error
Gain error or full-scale error is a measure of the output
error between an ideal DAC and the actual device output.
For these DACs, ideal maximum output is VREF – 1 LSB.
Gain error of the DACs is adjustable to zero with external
resistance.
Output Leakage Current
Output leakage current is current which flows in the DAC
ladder switches when these are turned off. For the IOUT1
terminal, it can be measured by loading all 0s to the DAC
and measuring the IOUT1 current. Minimum current will
flow in the IOUT2 line when the DAC is loaded with all 1s
Output Capacitance
Capacitance from IOUT1 or IOUT2 to AGND.
Output Current Settling Time
This is the amount of time it takes for the output to settle
to a specified level for a full scale input change. For these
devices, it is specifed with a 100 resistor to ground.
Digital to Analog Glitch lmpulse
The amount of charge injected from the digital inputs to
the analog output when the inputs change state. This is
normally specified as the area of the glitch in either
pA-secs or nV-secs depending upon whether the glitch is
measured as a current or voltage signal.
Digital Feedthrough
When the device is not selected, high frequency logic
activity on the device digital inputs is capacitivelly coupled
through the device to show up as noise on the IOUT pins
and subsequently into the following circuitry. This noise is
digital feedthrough.
Multiplying Feedthrough Error
This is the error due to capacitive feedthrough from the
DAC reference input to the DAC IOUT1 terminal, when all
o0s are loaded to the DAC.
Harmonic Distortion
The DAC is driven by an ac reference. The ratio of the
rms sum of the harmonics of the DAC output to the
fundamental value is the THD. Usually only the lower
order harmonices are included, such as second to fifth.
THD = 20log (V22 + V32 + V42 + V52)
V1
Intermodulation Distortion
The DAC is driven by two combinded sine waves
references of frequencies fa and fb. Distortion products are
produced at sum and difference frequencies of mfa±nfb
where m, n = 0, 1, 2, 3... Intermodulation terms are those
for which m or n is not equal to zero. The second order
terms include (fa +fb) and (fa - fb) and the third order
terms are (2fa + fb), (2fa -fb), (f+2fa + 2fb) and (fa -
2fb). IMD is defined as
IMD = 20log (rms sum of the sum and diff distortion products)
rms amplitude of the fundamental
Compliance Voltage Range
The maximum range of (output) terminal voltage for
which the device will provide the specified characteristics.
GENERAL DESCRIPTION
DAC Section
The AD5424, AD5433 and AD5445 are 8, 10 and 12 bit
current output DACs consisting of a standard inverting R-
2R ladder configuration. A simplified diagram for the 8-
Bit AD5424 is shown in Figure 3. The feedback resistor
RFB has a value of R. The value of R is typically 10k
(minimum 8kand maximum 12k). If IOUT1 and IOUT2
are kept at the same potential, a constant current flows in
each ladder leg, regardless of digital input code.
Therefore, the input resistance presented at VREF is always
constant.
VREF
R
R
R
2R 2R 2R
2R
S1 S2 S3
S8
DAC DATA LATCHES
AND DRIVERS
2R
R
RFB A
IOUTA
IOUT B
Figure 3. Simplified Ladder
Access is provided to the VREF, RFB, IOUT1 and IOUT2
terminals of the DAC, making the device extremely
versatile and allowing it to be configured in several
different operating modes, for example, to provide a
unipolar output, bipolar output or in single supply modes
of operation. in unipolar mode or four quadrant
multiplication in bipolar mode.
Unipolar Mode
Using a single op amp, these devices can easily be
configured to provide 2 quadrant multiplying operation or
a unipolar output voltage swing as shown in Figure 4.
When an output amplifier is connected in unipolar mode,
the output voltage is given by:
VOUT = -D x VREF
Where D is the fractional representation of the digital
word loaded to the DAC.
REV. PrH
–9–
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]