AD5424 View Datasheet(PDF) - Unspecified

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AD5424

High Bandwidth CMOS 8-/10-/12-Bit Parallel Interface Multiplying DACs

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PRELIMINARY TECHNICAL DATA

AD5424/AD5433/AD5445

D = 0 to 256 (8-Bit AD5424)

= 0 to 1024 (10-Bit AD5433)

= 0 to 4096 (12-Bit AD5445)

VDD

R2

C1

VDD

RFB

VREF

R1

IOUT1

VREF AD5424/33/45

IOUT2

R/W CS GND

VOUT = -D VREF

Bipolar Operation

In some applications, it may be necessary to generate full

4-Quadrant multplying operation or a bipolar output

swing. This can be easily accomplished by using another

external amplifier and some external resistors as shown in

Figure 5.

When VIN is an ac signal, the circuit performs four-

quadrant multiplication.

Table II. shows the relationship between digital code and

the expected output voltage for bipolar operation

(AD5426, 8-Bit device).

AGND

DATA

NOTES:

INPUTS

1R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.

2C1 PHASE COMPENSATION (10pF-15pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 4. Unipolar Operation

With a fixed 10 V reference, the circuit shown above will

give an unipolar 0V to -10V output voltage swing. When

VIN is an ac signal, the circuit performs two-quadrant

multiplication.

The following table shows the relationship between digital

code and expected output voltage for unipolar operation.

(AD5424, 8-Bit device).

Table II. Bipolar Code Table

Digital Input Analog Output (V)

1111 1111

1000 0000

0000 0001

0000 0000

+VREF (127/128)

0

-VREF (127/128)

-VREF (128/128)

Table I. Unipolar Code Table

Digital Input Analog Output (V)

1111 1111

1000 0000

0000 0001

0000 0000

-VREF (255/256)

-VREF (128/256) = -VREF/2

-VREF (1/256)

-VREF (0/256) = 0

R3

10kΩ

VDD

R2

VDD

RFB

C1

R1

VREF

IOUT1

VREF AD5424/33/45

A1

± 10V

IOUT2

R/W CS GND

R4

10kΩ

R5

20kΩ

A2

VOUT = -VREF to +VREF

DATA

INPUTS

NOTES:

AGND

1R1 AND R2 ARE USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.

ADJUST R1 FOR VOUT = 0V WITH CODE 10000000 LOADED TO DAC.

2MATCHING AND TRACKING IS ESSENTIAL FOR RESISTOR PAIRS

R3 AND R4.

3C1 PHASE COMPENSATION (10pF-15pF) MAY BE REQUIRED

IF A1/A2 IS A HIGH SPEED AMPLIFIER.

Figure 5. Bipolar Operation (4 Quadrant Multiplication)

–10–

REV. PrH

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