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74VCX162240MTDX-1999 View Datasheet(PDF) - Fairchild Semiconductor

Part NameDescriptionManufacturer
74VCX162240MTDX(1999) Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26Ω Series Resistors in Outputs Fairchild
Fairchild Semiconductor Fairchild
74VCX162240MTDX Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
January 1998
Revised April 1999
Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V
Tolerant Inputs and Outputs and 26Series Resistors in
General Description
The VCX162240 contains sixteen inverting buffers with 3-
STATE outputs to be employed as a memory and address
driver, clock driver, or bus oriented transmitter/receiver.
The device is nibble (4-bit) controlled. Each nibble has sep-
arate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The 74VCX162240 is designed for low voltage (1.65V to
3.6V) VCC applications with I/O capability up to 3.6V. The
74VCX162240 is also designed with 26series resistors in
the outputs. This design reduces line noise in applications
such as memory address drivers, clock drivers, and bus
The 74VCX162240 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
s 1.65V–3.6V VCC supply operation
s 3.6V tolerant inputs and outputs
s 26series resistors in outputs
s tPD
3.3 ns max for 3.0V to 3.6V VCC
3.8 ns max for 2.3V to 2.7V VCC
7.6 ns max for 1.65V to 1.95V VCC
s Power-off high impedance inputs and outputs
s Supports live insertion and withdrawal (Note 1)
s Static Drive (IOH/IOL)
±12 mA @ 3.0V VCC
±8 mA @ 2.3V VCC
±3 mA @ 1.65V VCC
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 300 mA
s ESD performance:
Human body model > 2000V
Machine model > 200V
Note 1: To ensure the high-impedance state during power up or power
down, OE should be tied to VCC through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
Ordering Code:
Order Number Package Number
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JECED MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Pin Names
Output Enable Input (Active LOW)
© 1999 Fairchild Semiconductor Corporation DS500091.prf
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