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54LS161ADMQB View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
54LS161ADMQB Synchronous 4-Bit Binary Counters National-Semiconductor
National ->Texas Instruments National-Semiconductor
54LS161ADMQB Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
’LS163 Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Typ
Min
(Note 1)
VI
Input Clamp Voltage
VCC e Min II e b18 mA
VOH
High Level Output
VCC e Min IOH e Max
DM54
Voltage
VIL e Max VIH e Min
DM74
25
34
27
34
VOL
Low Level Output
VCC e Min IOL e Max
DM54
Voltage
VIL e Max VIH e Min
DM74
0 25
0 35
IOL e 4 mA VCC e Min
DM74
II
Input Current Max
VCC e Max
Input Voltage
VI e 7V
Enable T
Clock Clear
0 25
Load
Others
IIH
High Level Input
VCC e Max
Current
VI e 2 7V
Enable T
Load
Clock Clear
Others
IIL
Low Level Input
VCC e Max
Current
VI e 0 4V
Enable T
Clock Clear
Load
Others
IOS
Short Circuit
Output Current
VCC e Max
(Note 2)
DM54
DM74
b20
b20
ICCH
Supply Current with
VCC e Max
18
Outputs High
(Note 3)
ICCL
Supply Current with
VCC e Max
18
Outputs Low
(Note 4)
Note 1 All typicals are at VCC e 5V TA e 25 C
Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second
Note 3 ICCH is measured with the load high then again with the load low with all other inputs high and all outputs open
Note 4 ICCL is measured with the clock input high then again with the clock input low with all other inputs low and all outputs open
Max
b1 5
04
05
04
02
02
02
01
40
40
40
20
b0 8
b0 8
b0 8
b0 4
b100
b100
31
32
’LS163 Switching Characteristics
at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
From (Input)
To (Output)
RL e 2 kX
CL e 15 pF
CL e 50 pF
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
25
20
tPLH
Propagation Delay Time
Clock to
25
30
Low to High Level Output
Ripple Carry
tPHL
Propagation Delay Time
Clock to
30
38
High to Low Level Output
Ripple Carry
tPLH
Propagation Delay Time
Clock to Any Q
22
27
Low to High Level Output
(Load High)
tPHL
Propagation Delay Time
Clock to Any Q
27
38
High to Low Level Output
(Load High)
Units
V
V
V
mA
mA
mA
mA
mA
mA
Units
MHz
ns
ns
ns
ns
5
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