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74ABT125CMTC View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
74ABT125CMTC
Fairchild
Fairchild Semiconductor Fairchild
74ABT125CMTC Datasheet PDF : 6 Pages
1 2 3 4 5 6
March 1994
Revised February 2005
74ABT125
Quad Buffer with 3-STATE Outputs
General Description
The ABT125 contains four independent non-inverting buff-
ers with 3-STATE outputs.
Features
s Non-inverting buffers
s Output sink capability of 64 mA, source capability of
32 mA
s Guaranteed latchup protection
s High impedance glitch free bus loading during entire
power up and power down cycle
s Nondestructive hot insertion capability
s Disable time less than enable time to avoid bus
contention
Ordering Code:
Order Number
Package
Number
Package Description
74ABT125CSC
M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74ABT125CSJ
M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74ABT125CMTC
MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ABT125CMTCX_NL MTC14 Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
(Note 1)
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Connection Diagram
Pin Descriptions
Pin Names
An, Bn
On
Function Table
Descriptions
Inputs
Outputs
Inputs
An
Bn
L
L
L
H
H
X
H HIGH Voltage Level
L LOW Voltage Level
Z HIGH Impedance
X Immaterial
Output
On
L
H
Z
© 2005 Fairchild Semiconductor Corporation DS011667
www.fairchildsemi.com
 

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