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54ACTQ373F View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
54ACTQ373F Quiet Series Octal Transparent Latch with TRI-STATE® Outputs National-Semiconductor
National ->Texas Instruments National-Semiconductor
54ACTQ373F Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
Connection Diagrams
Pin Assignment for
DIP and Flatpak
Pin Assignment
for LCC
DS100238-3
Functional Description
The ’ACQ/’ACTQ373 contains eight D-type latches with
TRI-STATE standard outputs. When the Latch Enable (LE)
input is HIGH, data on the Dn inputs enters the latches. In
this condition the latches are transparent, i.e., a latch output
will change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The TRI-STATE standard outputs are controlled
by the Output Enable (OE) input. When OE is LOW, the stan-
dard outputs are in the 2-state mode. When OE is HIGH, the
standard outputs are in the high impedance mode but this
does not interfere with entering new data into the latches.
Logic Diagram
DS100238-4
Truth Table
Inputs
Outputs
LE
OE
Dn
On
X
H
X
Z
H
L
L
L
H
L
H
H
L
L
X
O0
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH to Low transition of Latch Enable
DS100238-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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