MC33742EP/R2 View Datasheet(PDF) - Freescale Semiconductor
Part Name
Description
View to exact match
MC33742EP/R2 Datasheet PDF : 70 Pages
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PIN CONNECTIONS
Transparent
Top View
NC 1
SCLK 2
MISO 3
MOSI 4
CS 5
WDOG 6
RXD 7
TXD 8
VDD 9
RST 10
INT 11
NC 12
36 NC
35 CANL
34 CANH
33 L3
32 L2
31 L1
30 L0
29 HS
28 VSUP
27 V2 CTRL
26 V2
25 NC
Figure 4. 33742 48-Pin Connections
Table 3. 33742 48-Pin Definitions
A functional description of each pin can be found in the Functional Pin description section beginning on page 23.
Pin
Pin Name
Formal Name
Definition
1, 12-16,
21-25,
36-40,
45-48
2
NC
SCLK
No Connect
No connection.
Serial Data Clock
Clock input pin for the Serial Peripheral Interface (SPI).
3
MISO
Master In Slave Out
SPI data sent to the MCU by the 33742. When CS is HIGH, the pin is in the high-
impedance state.
4
MOSI
Master Out Slave In
SPI data received by the 33742.
5
CS
Chip Select
(Active LOW)
The CS input pin is used with the SPI bus to select the 33742. When the CS is asserted
LOW, the 33742 is the selected device of the SPI bus.
6
WDOG
Watchdog Output
The WDOG output pin is asserted LOW if the software watchdog is not correctly
(Active LOW)
triggered.
7
RXD
Receive Data
CAN bus receive data output pin.
8
TXD
Transmit Data
CAN bus transmit data input pin.
9
VDD
Voltage Digital Drain 5.0V regulator output pin. Supply pin for the MCU.
10
RST
11
INT
Reset Output
(Active LOW)
Interrupt Output
(Active LOW)
This is the device reset output pin whose main function is to reset the MCU. This pin has
an internal pullup current source to VDD.
This output is asserted LOW when an enabled interrupt condition occurs. The output is
a push-pull structure.
17-20
41-44
GND
Ground
These device ground pins are internally connected to the package lead frame to provide
a 33742-to-PCB thermal path.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33742
5
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