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74AHC138BQ,115 View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
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74AHC138BQ,115
NXP
NXP Semiconductors. NXP
74AHC138BQ,115 Datasheet PDF : 17 Pages
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Nexperia
5. Pinning information
5.1 Pinning
74AHC138; 74AHCT138
3-to-8 line decoder/demultiplexer; inverting
A0 1
A1 2
A2 3
E1 4
E2 5
E3 6
Y7 7
GND 8
16 VCC
15 Y0
14 Y1
13 Y2
138
12 Y3
11 Y4
10 Y5
9 Y6
001aad033
Fig 4. Pin configuration for SO16 and TSSOP16
terminal 1
index area
A1 2
A2 3
E1 4
E2 5
E3 6
Y7 7
138
GND(1)
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
001aad035
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Fig 5. Pin configuration for DHVQFN16
5.2 Pin description
Table 2.
Symbol
A0
A1
A2
E1
E2
E3
GND
Y0 to Y7
VCC
Pin description
Pin
1
2
3
4
5
6
8
15, 14, 13, 12, 11, 10, 9, 7
16
Description
address input
address input
address input
enable input (active LOW)
enable input (active LOW)
enable input (active HIGH)
ground (0 V)
output
supply voltage
74AHC_AHCT138
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 2 April 2014
© Nexperia B.V. 2017. All rights reserved
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