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74HC74D View Datasheet(PDF) - NXP Semiconductors.

Part Name74HC74D NXP
NXP Semiconductors. NXP
DescriptionDual D-type flip-flop with set and reset; positive edge-trigger


74HC74D Datasheet PDF : 21 Pages
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NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
Table 8. Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 9.
Symbol Parameter Conditions
Tamb = 40 C to +85 C
Tamb = 40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
tsu
set-up time nD to nCP; see Figure 7
VCC = 2.0 V
75
6
-
90
VCC = 4.5 V
15
2
-
18
VCC = 6.0 V
13
2
-
15
th
hold time nD to nCP; see Figure 7
VCC = 2.0 V
3
6
-
3
VCC = 4.5 V
3
2
-
3
VCC = 6.0 V
3
2
-
3
fmax
maximum nCP; see Figure 7
frequency
VCC = 2.0 V
4.8
23
-
4.0
VCC = 4.5 V
24
69
-
20
VCC = 5 V; CL = 15 pF
-
76
-
-
VCC = 6.0 V
28
82
-
24
CPD
power
CL = 50 pF; f = 1 MHz;
[4]
-
24
-
-
dissipation VI = GND to VCC
capacitance
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
-
MHz
-
MHz
-
MHz
-
MHz
-
pF
74HCT74
tpd
propagation nCP to nQ, nQ; see
[2]
delay
Figure 7
VCC = 4.5 V
-
18
44
-
VCC = 5 V; CL = 15 pF
-
15
-
-
nSD to nQ, nQ; see
[2]
Figure 8
53
ns
-
ns
VCC = 4.5 V
-
23
50
-
VCC = 5 V; CL = 15 pF
-
18
-
-
nRD to nQ, nQ; see
[2]
Figure 8
60
ns
-
ns
VCC = 4.5 V
-
24
50
-
VCC = 5 V; CL = 15 pF
-
18
-
-
tt
transition nQ, nQ; see Figure 7
[3]
time
VCC = 4.5 V
-
7
19
-
tW
pulse width nCP HIGH or LOW;
see Figure 7
60
ns
-
ns
22
ns
VCC = 4.5 V
nSD, nRD LOW;
see Figure 8
23
9
-
27
-
ns
VCC = 4.5 V
20
9
-
24
trec
recovery nSD, nRD; see Figure 8
time
VCC = 4.5 V
8
1
-
9
tsu
set-up time nD to nCP; see Figure 7
VCC = 4.5 V
15
5
-
18
-
ns
-
ns
-
ns
74HC_HCT74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 27 August 2012
© NXP B.V. 2012. All rights reserved.
8 of 21
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The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.

The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual
data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has
complementary outputs (Q andQ).

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