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74HC74D View Datasheet(PDF) - NXP Semiconductors.

Part Name74HC74D NXP
NXP Semiconductors. NXP
DescriptionDual D-type flip-flop with set and reset; positive edge-trigger


74HC74D Datasheet PDF : 21 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
NXP Semiconductors
74HC74; 74HCT74
Dual D-type flip-flop with set and reset; positive edge-trigger
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
D
BA
terminal 1
index area
A
A1
E
c
detail X
terminal 1
e1
C
index area
e
b
vM C AB
y1 C
y
2
6
wM C
L
1
Eh
14
7
e
8
13
9
Dh
0
2.5
X
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A(1)
max.
A1
b
c
D(1) Dh E(1) Eh
e
e1
L
v
w
y
y1
mm
1
0.05 0.30
0.00 0.18
0.2
3.1 1.65
2.9 1.35
2.6
2.4
1.15
0.85
0.5
2
0.5
0.3
0.1 0.05 0.05
0.1
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
EUROPEAN
PROJECTION
SOT762-1
---
MO-241
---
ISSUE DATE
02-10-17
03-01-27
Fig 14. Package outline SOT762-1 (DHVQFN14)
74HC_HCT74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 27 August 2012
© NXP B.V. 2012. All rights reserved.
17 of 21
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The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard
No. 7-A.

The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type flip-flop with individual
data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has
complementary outputs (Q andQ).

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