FM-1288-GE-400B View Datasheet(PDF) - Unspecified

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FM-1288-GE-400B

High Performance Voice Processor for Automotive Handsfree

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2.8 Modes of Operation

Depending on the condition, the FM1288 operates in one of the following 4 modes.

Hardware Reset Mode

Whenever power is applied or RST_ is low, the processor enters into this mode and remains in it until

10ms (10 milliseconds) after the RST_ pin being pulled high. During that 10ms, the processor waits for

the external clock and the internal PLL to stablize. 10ms after the RST_ pin is pulled high, the processor

transitions into the Software Reset Mode.

Note that the RST_ pin should not be used as a power-down function, but instead as a power-down

wake-up function.

Software Reset Mode

In this mode, the FM-1288 either takes command parameters from an external host through the IIC-

compatible SHI, or it actively reads the configuration parameters from an external EEPROM. These

commands and parameters are to establish the various operation configuration of the FM-1288. The

processor exits this mode to enter into the Operational Mode when the parameter value at location

DM(0x22FB) is set to 0, which is done by the FM-1288 on-chip DSP processor upon completion of all

parameter configuration.

Operational Mode

Entering this mode, the on-chip software sets up the hardware internal registers according to the

parameter configuration and then performs a nominal 90 ms initialization procedure. Afterwards, the

FM1288 starts the data transfer from its input, performs processing, and delivers outputs through the

analog/digital interfaces. When PWD_ pin is asserted low, the processor transitions and enters into the

Power Down Mode.

Power Down Mode

While in the Power Down mode, asserting the RST_ pin to high or the PWD_ pin to high will cause the

FM-1288 to exit Power Down.

In the Power Down Mode, the on-chip power is switched off to reduce leakage. Also, after PWD_ pin is

asserted high, external clock will be turned off after Tsu_pp2clkoff (section 4.5) to reduce leakage

current.

In the Power Down Mode, if PWD_ is set to high, then the processor can either return into the Software

Reset Mode or into the Operational Mode, depends on the setting of the pwrdwn_set parameter at

DM(0x22F1). If it goes to the Operational Mode, no parameter setting is required since all the internal

register values have been maintained. In order for the processor to exit the Power Down Mode

correctly, the processor needs a 13ms internal state-management before it can accept any new set of

parameter download, or re-entering into the Operational Mode. Also see the FM-1288 Configuration

Guide for related details.

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