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YDA143-EZ View Datasheet(PDF) - Yamaha Corporation

Part Name
Description
View to exact match
YDA143-EZ
Yamaha
Yamaha Corporation Yamaha
YDA143-EZ Datasheet PDF : 22 Pages
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YDA143
Mode setting
Operating Mode
Outline
L
*
*
* WL WL WL WL Z
H
L
L
* WL WL WL WL Z
H
L
H
* WL WL RF RF Z
H
H
L LLL P-H P-H WL WL Z
H
H
L LLH P-L P-L WL WL Z
H
H
L LHL P-H P-H WL WL Z
H
H
L LHH P-L P-L WL WL Z
H
H
L HLL PLS PLS WL WL Z
H
H
L HHL PLS PLS WL WL Z
H
H
H
* WL WL SIG SIG Z
Z
Sleep mode
-
DA Mute mode *A)
-
HA Mute mode *A)
-
DA External Clock Slave mode *A)
-
DA External Clock Slave mode *A)
-
DA External Clock Master mode *A)
-
DA External Clock Master mode *A)
-
DA Internal Clock Slave mode *A)
-
DA Internal Clock Master mode *A)
-
HA mode *A)
H
*
* LL* -
-
-
-
- CKIN 4.19MHz Clock Input
H
*
* LH* -
-
-
-
- CKOUT 4.19MHz Clock Output
H
*
* HLL -
-
-
-
-
CKIN 500kHz Input (Internal Clock)
H
*
* HHL -
-
-
-
- CKOUT 500kHz Output (Internal Clock)
Note:
1) “H” and L” means logic level High and logic level Low, respectively.
2) “WL” means output disabled (weak pull-down output). “RF” means reference level output. “Z” means Hi-Z.
3) “P-H” means a carrier clock of 524kHz. “P-L” means a carrier clock of 466kHz. “PLS” means a carrier clock of
approx. 500kHz (Internally generated clock).
4) “SIG” means an analog audio signal output.
5) “CKIN” means input of a clock with designated frequency. “CKOUT” means output of a designated clock.
6) “DA” means Digital Amplifier. “HA” means Headphone Amplifier.
7) Each output of OUT*L, OUT*R, HPOL, HPOR, PROTN, and CKIO becomes a state as shown in “Protection
Mode”, depending on the protection state, when entering protection state from a mode except sleep mode.
8) In operating modes indicated by *A), a state of the output signal becomes a state as shown in “Protection Mode”
during a protection mode.
9) “HLH” and “HHH” of MODE[2:0] is reserved for system use.
Protection Mode
Outline
H H L * WL WL WL WL L
Z Digital Amplifier Over-current Protection
H * * * WL WL WL WL L
Z Over-Temperature Protection
H * * * WL WL - - -
- Clock Stop Protection
H * * * WL WL WL WL Z
Z Low Voltage Malfunction Prevention Protection
H H * * WL WL RF RF -
- Power Supply Voltage Fluctuation Protection
Note:
1) Each protection function operates when input terminal is in the designated logic condition. Output terminal
becomes a state as shown in the above during protection mode.
5
 

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