XRT91L30
STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
xr
REV. 1.0.1
2.2 Recieve Serial Data Input Timing
The received High-Speed Serial Differential Data Input must adhere to the set-up and hold time timing
specifications below.
FIGURE 4. RECEIVE HIGH-SPEED SERIAL DATA INPUT TIMING DIAGRAM
XRXCLKIP
XRXCLKIN
RXIP
RXIN
tRX_SU
tRXCLK
tRX_HD
TABLE 3: RECEIVE HIGH-SPEED SERIAL DATA INPUT TIMING (STS-12/STM-4 OPERATION)
SYMBOL
PARAMETER
MIN
TYP
MAX
tRXCLK
tRX_SU
tRX_HD
Receive external recovered clock period
Serial data setup time with respect to XRXCLKIP/N
Serial data hold time with respect to XRXCLKIP/N
1.608
400
100
UNITS
ns
ps
ps
TABLE 4: RECEIVE HIGH-SPEED SERIAL DATA INPUT TIMING (STS-3/STM-1 OPERATION)
SYMBOL
tRXCLK
tRX_SU
tRX_HD
PARAMETER
Receive external recovered clock period
Serial data setup time with respect to XRXCLKIP/N
Serial data hold time with respect to XRXCLKIP/N
MIN
TYP
MAX UNITS
6.43
ns
1.5
ns
1.5
ns
14