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MH88625 View Datasheet(PDF) - Mitel Networks

Part Name
Description
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MH88625 Datasheet PDF : 16 Pages
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Preliminary Information
MH88625
Pin Description (Continued)
Pin # Name
Description
19
NATT Network Balance AT+T Node. Connects to N1 for a network balance impedance of AT&T
compromise (350+ 1k// 210nF); the device’s input impedance must be set to 600. This
node is active only when NS is at logic high. This node should be left open circuit when not
used.
20
N1 Network Balance Node 1 (Input). 0.1 times the impedance between pins N1 and N2 must
match the device’s input impedance, while 0.1 times the impedance between pins N1 and
AGND is the device’s network balance impedance. This node is active only when NS is at
logic high. This node may be terminated when not used (i.e., NS at logic low).
21
N2 Network Balance Node 2 (Output). See N1 for description.
22
Z900 Line Impedance 900Node. Connects to Z1 for a line impedance of 900. This node
should be left open circuit when not used.
23
Z1 Line Impedance Node 1 (Input). 0.1 times the times the impedance between pins Z1 and
Z2 is the device’s line impedance. This node must always be connected.
24
Z2 Line Impedance Node 2 (Output). 0.1 times the times the impedance between pins Z1 and
Z2 is the device’s line impedance. This node should be left open circuit when not used.
25
TX Transmit (Output). 4-Wire (AGND) referenced audio output.
26
RX Receive (Input). 4-Wire (AGND) referenced audio input.
27
GTX0 Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain.
28
GTX1 Transmit Gain Node 1. Connects to a resistor to AGND for transmit gain adjustment.
29
GRX0 Receive Gain Node 0. Connects to GRX1 for 0dB gain.
30
GRX1 Receive Gain Node 1. Connects to a resistor to AGND to receive gain adjustment.
31
IC Internal Connection. This pin is internally connected and must be left open.
32
Z600 Line Impedance 600Node (Output). Connects to Z1 for a line impedance of 600. This
pin should be left open circuit when not used.
33
NS Network Balance Setting (Input). The logic level at NS selects the network balance
impedance. A logic 0 enables an internal balance equivalent to the input impedance (Zin).
While a logic 1 enables an external balance 0.1 times the impedance between pins N1 and
AGND balanced to 0.1 times the impedance between pins N1 and N2. The impedance
between N1 and N2 must be equivalent to 10 times the input impedance (Zin).
34
SHK Off-Hook Indication (Output). A logic low output indicates when the subscriber equipment
has gone Off-Hook.
35
36,37,38
39
40
UD Unbalance Detect (Output). A log IC low output indicates when the DC current flow in the
Tip and Ring leads is unbalanced, indicating that the subscriber equipment has grounded
the Ring lead.
IC Internal Connection. These pins are internally connected and must be left open
VEE Negative Supply Voltage. -5V dc.
VDD Positive Supply Voltage. +5V dc.
2-185
 

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