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X1227I View Datasheet(PDF) - Intersil

Part Name
Description
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X1227I Datasheet PDF : 28 Pages
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Write Cycle Timing
X1227
SCL
SDA
8th Bit of Last Byte
ACK
tWC
Stop
Condition
Start
Condition
Power-up Timing
Symbol
Parameter
Min.
Typ.(2)
Max.
Units
tPUR(1)
tPUW(1)
Time from Power-up to Read
Time from Power-up to Write
1
ms
5
ms
Notes: (1) Delays are measured from the time VCC is stable until the specified operation can be initiated. These parameters are periodically
sampled and not 100% tested.
(2) Typical values are for TA = 25°C and VCC = 5.0V
Nonvolatile Write Cycle Timing
Symbol
tWC(1)
Parameter
Write Cycle Time
Min.
Typ.(1)
5
Max.
10
Units
ms
Notes: (1) tWC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is
the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
WATCHDOG TIMER/LOW VOLTAGE RESET OPERATING CHARACTERISTICS
Watchdog/Low Voltage Reset Parameters
Symbols
VPTRIP
tRPD
tPURST
Parameters
Programmed Reset Trip Voltage
X1227-4.5A
X1227
X1227-2.7A
X1227-2.7
VCC Detect to RESET LOW
Power-up Reset Time-out Delay
Min.
4.5
4.25
2.7
2.55
100
Typ.
4.68
4.38
2.93
2.68
200
Max.
4.75
4.5
3.0
2.7
500
400
Unit
V
ns
ms
tF
tR
tWDO
tRST
VCC Fall Time
VCC Rise Time
Watchdog Timer Period:
WD1 = 0, WD0 = 0
WD1 = 0, WD0 = 1
WD1 = 1, WD0 = 0
Watchdog Reset Time-out Delay
10
µs
10
µs
1.7
1.75
1.8
s
725
750
775
ms
225
250
275
ms
225
250
275
ms
tRSP
VRVALID
2-Wire interface
Reset Valid VCC
1
µs
1.0
V
7
FN8099.2
May 8, 2006
 

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