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부품명X1226Z Intersil
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상세내역4K (512 x 8), 2-Wire™ RTC
X1226Z Datasheet PDF : 25 Pages
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X1226
ALARM REGISTERS
There are two alarm registers whose contents mimic the
contents of the RTC register, but add enable bits and
exclude the 24 hour time selection bit. The enable bits
specify which registers to use in the comparison between
the Alarm and Real Time Registers. For example:
– Setting the Enable Month bit (EMOn*) bit in combi-
nation with other enable bits and a specific alarm
time, the user can establish an alarm that triggers at
the same time once a year.
*n = 0 for Alarm 0: N = 1 for Alarm 1
When there is a match, an alarm flag is set. The occur-
rence of an alarm can be determined by polling the
AL0 and AL1 bits or by enabling the IRQ output, using
it as hardware flag.
The alarm enable bits are located in the MSB of the
particular register. When all enable bits are set to ‘0’,
there are no alarms.
– The user can set the X1226 to alarm every Wednes-
day at 8:00 AM by setting the EDWn*, the EHRn*
and EMNn* enable bits to ‘1’ and setting the DWAn*,
HRAn* and MNAn* Alarm registers to 8:00 AM
Wednesday.
– A daily alarm for 9:30PM results when the EHRn*
and EMNn* enable bits are set to ‘1’ and the HRAn*
and MNAn* registers are set to 9:30 PM.
*n = 0 for Alarm 0: N = 1 for Alarm 1
REAL TIME CLOCK REGISTERS
Clock/Calendar Registers (SC, MN, HR, DT, MO, YR)
These registers depict BCD representations of the
time. As such, SC (Seconds) and MN (Minutes) range
from 00 to 59, HR (Hour) is 1 to 12 with an AM or PM
indicator (H21 bit) or 0 to 23 (with MIL = 1), DT (Date)
is 1 to 31, MO (Month) is 1 to 12, YR (Year) is 0 to 99.
Date of the Week Register (DW)
This register provides a Day of the Week status and
uses three bits DY2 to DY0 to represent the seven
days of the week. The counter advances in the cycle
0-1-2-3-4-5-6-0-1-2-… The assignment of a numerical
value to a specific day of the week is arbitrary and may
be decided by the system software designer. The
default value is defined as ‘0’.
24 Hour Time
If the MIL bit of the HR register is 1, the RTC uses a
24-hour format. If the MIL bit is 0, the RTC uses a 12-
hour format and H21 bit functions as an AM/PM
indicator with a ‘1’ representing PM. The clock defaults
to standard time with H21 = 0.
Leap Years
Leap years add the day February 29 and are defined
as those years that are divisible by 4. Years divisible
by 100 are not leap years, unless they are also divisi-
ble by 400. This means that the year 2000 is a leap
year, the year 2100 is not. The X1226 does not correct
for the leap year in the year 2100.
STATUS REGISTER (SR)
The Status Register is located in the CCR memory
map at address 003Fh. This is a volatile register only
and is used to control the WEL and RWEL write
enable latches, read power status and two alarm bits.
This register is separate from both the array and the
Clock/Control Registers (CCR).
Table 2. Status Register (SR)
Addr 7 6 5 4 3
003Fh BAT AL1 AL0 0 0
Default 0 0 0 0 0
2
1
0
RWEL WEL RTCF
0
0
1
BAT: Battery Supply—Volatile
This bit set to “1” indicates that the device is operating
from VBACK, not VCC. It is a read-only bit and is
set/reset by hardware (X1226 internally). Once the
device begins operating from VCC, the device sets this
bit to “0”.
AL1, AL0: Alarm bits—Volatile
These bits announce if either alarm 0 or alarm 1 match
the real time clock. If there is a match, the respective
bit is set to ‘1’. The falling edge of the last data bit in a
SR Read operation resets the flags. Note: Only the AL
bits that are set when an SR read starts will be reset.
An alarm bit that is set by an alarm occurring during an
SR read operation will remain set after the read opera-
tion is complete.
RWEL: Register Write Enable Latch—Volatile
This bit is a volatile latch that powers up in the LOW
(disabled) state. The RWEL bit must be set to “1” prior
to any writes to the Clock/Control Registers. Writes to
RWEL bit do not cause a nonvolatile write cycle, so
the device is ready for the next operation immediately
after the stop condition. A write to the CCR requires
both the RWEL and WEL bits to be set in a specific
sequence.
7
FN8098.3
May 8, 2006
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DESCRIPTION
The X1226 device is a Real Time Clock with clock/calendar, two polled alarms with integrated 512x8 EEPROM, oscillator compensation, and battery backup switch.

Real Time Clock/Calendar with EEPROM
FEATURES
• Real Time Clock/Calendar
   —Tracks Time in Hours, Minutes, and Seconds
   —Day of the Week, Day, Month, and Year
• 2 Polled Alarms (Non-volatile)
   —Settable on the Second, Minute, Hour, Day of the Week, Day, or Month
   —Repeat Mode (periodic interrupts)
• Oscillator Compensation On Chip
   —Internal Feedback Resistor and Compensation Capacitors
   —64 Position Digitally Controlled Trim Capacitor
   —6 Digital Frequency Adjustment Settings to ±30ppm
• Battery Switch or Super Cap Input
• 512 x 8 Bits of EEPROM
   —64-Byte Page Write Mode
   —8 Modes of Block Lock™ Protection
   —Single Byte Write Capability
• High Reliability
   —Data Retention: 100 Years
   —Endurance: 100,000 Cycles Per Byte
• 2-Wire™ Interface Interoperable with I2C
   —400kHz Data Transfer Rate
• Frequency Output (SW Selectable: Off, 1Hz, 4096Hz or 32.768kHz)
• Low Power CMOS
   —1.25µA Operating Current (Typical)
• Small Package Options
   —8 Ld SOIC and 8 Ld TSSOP
• Repetitive Alarms
• Temperature Compensation
• Pb-Free Plus Anneal Available (RoHS Compliant)

APPLICATIONS
• Utility Meters
• HVAC Equipment
• Audio/Video Components
• Set Top Box/Television
• Modems
• Network Routers, Hubs, Switches, Bridges
• Cellular Infrastructure Equipment
• Fixed Broadband Wireless Equipment
• Pagers/PDA
• POS Equipment
• Test Meters/Fixtures
• Office Automation (Copiers, Fax)
• Home Appliances
• Computer Products
• Other Industrial/Medical/Automotive

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