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X1226I 데이터 시트보기 (PDF) - Intersil

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X1226I 4K (512 x 8), 2-Wire™ RTC Intersil
Intersil Intersil
X1226I Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
X1226
Ordering Information
PART NUMBER
X1226S8*
X1226S8Z* (Note)
X1226S8I*
X1226S8IZ* (Note)
X1226V8*
X1226V8Z* (Note)
PART MARKING
X1226
X1226Z
X1226I
X1226ZI
1226
1226Z
VDD (V)
2.7 to 5.5
TEMP
RANGE (°C)
0 to 70
0 to 70
-40 to 85
-40 to 85
0 to 70
0 to 70
PACKAGE
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld TSSOP (4.4mm)
8 Ld TSSOP (4.4mm) (Pb-free)
PKG. DWG. #
MDP0027
MDP0027
MDP0027
MDP0027
M8.173
M8.173
X1226V8I*
1226I
-40 to 85 8 Ld TSSOP (4.4mm)
M8.173
X1226V8IZ* (Note)
1226IZ
-40 to 85 8 Ld TSSOP (4.4mm) (Pb-free)
M8.173
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN CONFIGURATION
X1
X2
PHZ/IRQ
VSS
8 LD SOIC
1
8
2
7
3
6
4
5
VCC
VBACK
SCL
SDA
VBACK
VCC
X1
X2
8 LD TSSOP
1
8
2
7
3
6
4
5
SCL
SDA
VSS
PHZ/IRQ
2
FN8098.3
May 8, 2006
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