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WM8850 View Datasheet(PDF) - Wolfson Microelectronics plc

Part NameDescriptionManufacturer
WM8850 Multi-Channel High Definition Audio CODEC Wolfson
Wolfson Microelectronics plc Wolfson
WM8850 Datasheet PDF : 223 Pages
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INTERNAL POWER ON RESET CIRCUIT
WM8850
Figure 2 Internal Power on Reset Circuit Schematic
The WM8850 includes an internal Power-On-Reset Circuit, as shown in Figure 2, which is used to
reset the digital logic into a default state after power up. The POR circuit is both powered from and
monitors DCVDD. It asserts the internal R¯¯E¯S¯E¯T¯ low if DCVDD is below a minimum threshold.
Figure 3 Typical Power up Sequence
Figure 3 shows a typical power-up sequence. The R¯¯E¯S¯E¯T¯ signal is undefined until DCVDD has
exceeded the minimum threshold, Vpor_active. Once this threshold has been exceeded, R¯¯E¯S¯E¯T¯ is
asserted low and the chip is held in reset. In this condition, all stimulus to the WM8850 is ignored.
Once DCVDD has reached Vpor_on, R¯¯E¯S¯E¯T¯ is released high, all registers are in their default state and
access to the WM8850 via the HDA Interface may take place.
On power down, R¯¯E¯S¯E¯T¯ is asserted low whenever DCVDD drops below the minimum threshold
Vpor_off.
Typical Power-On Reset parameters for the WM8850 are defined in Table 2.
SYMBOL
MIN TYP MAX UNIT
Vpor_active
0.1
V
Vpor_on
1.23
V
Vpor_off
1.16
V
Table 2 Typical Power-On Reset parameters
w
PP, April 2011, Rev 3.2
27
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