NB85E View Datasheet(PDF) - NEC => Renesas Technology

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NB85E

32-Bit Microprocessor Core

NEC => Renesas Technology 

CHAPTER 5 INSTRUCTIONS

• TST:

• XOR:

• XORI:

• ZXB:

• ZXH:

Test

Exclusive OR

Exclusive OR immediate

Zero extend byte

Zero extend halfword

(7) Branch instructions

These instructions include unconditional branch instructions (JARL, JMP, JR) and a conditional branch

instruction (Bcond) that alters the control depending on the status of flags. Program control can be

transferred to the address specified by the branch instruction. The following instructions (mnemonics) are

provided.

• Bcond (BC, BE, BGE, BGT, BH, BL, BLE, BLT, BN, BNC, BNE, BNH, BNL, BNV, BNZ, BP, BR, BSA, BV,

BZ):

Branch on condition code

• JARL:

Jump and register link

• JMP:

Jump register

• JR:

Jump relative

(8) Bit manipulation instructions

Execute a logical operation to bit data in memory.

instructions (mnemonics) are provided.

Only the specified bit is affected.

The following

• CLR1:

• NOT1:

• SET1:

• TST1:

Clear bit

Not bit

Set bit

Test bit

(9) Special instructions

These instructions are instructions not included in the categories of instructions described above. The

following instructions (mnemonics) are provided.

• CALLT:

Call with table look up

• CTRET: Return from CALLT

• DI:

Disable interrupt

• DISPOSE: Function dispose

• EI:

Enable interrupt

• HALT:

Halt

• LDSR:

Load system register

• NOP:

No operation

• PREPARE: Function prepare

• RETI:

Return from trap or interrupt

• STSR:

Store system register

• SWITCH: Jump with table look up

• TRAP:

Trap

User’s Manual U14559EJ3V1UM

49

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