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UPD161831 View Datasheet(PDF) - NEC => Renesas Technology

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UPD161831 Datasheet PDF : 67 Pages
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µPD161831
6.2 Serial Interface
The µPD161831 uses an 8-bit serial interface to set registers related to the horizontal period and vertical period
from the MCU, and control the timing of outputting strobe signals to the gate driver.
In addition, the back panel LCD controller driver can also be controlled.
6.2.1 Serial interface between MCU and µPD161831
The serial interface between MCU and µPD161831 can acknowledge serial data input (SI), serial clock input
(SCLK), and serial data output (SO) if the chip select signal (LCDCS) is active (LCDS = H). This interface supports
SPI, and its relationship with the valid edge of the serial clock and the active level of the serial clock can be set by
using the SCLEG0 and SCLEG1 pins.
Pin Name
SCLEG1
L
L
H
H
SCLEG0
L
H
L
H
Table 61. Relationship between Serial Clock and Data
Active Level of Serial Clock
Input Timing of Serial Data
Output Timing of Serial Data
Low level
Low level
High level
High level
Rising edge of serial clock
Falling edge of serial clock
Falling edge of serial clock
Rising edge of serial clock
Falling edge of serial clock
Rising edge of serial clock
Rising edge of serial clock
Falling edge of serial clock
Figure 62 shows the signal chart of the serial interface.
LCDCS
SCLK (SCLEG1 = L)
SCLK (SCLEG1 = H)
SO & SI (SCLEG0 = L)
SO & SI (SCLEG0 = H)
Figure 62. Serial Interface Signal Chart
A7 A6 A5 A4 A3 A2 A1 A0
A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Serial interface operation specification register transfer
Command & data transfer
Remarks 1. ” indicates the timing of reading data.
2. If the chip is not active, the shift register and counter are reset to the default status.
3. When wiring SCL, the influence of terminal reflection and external noise due to the wiring length must
be taken into consideration. It is recommended to confirm the operation on the actual system.
Preliminary Product Information S16269EJ2V0PM
43
 

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