UPD17072 View Datasheet(PDF) - NEC => Renesas Technology

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UPD17072

4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM

NEC => Renesas Technology 

µPD17072,17073

5.2.2 Functions of address register

The address register specifies a program memory address when the table reference instruction (“MOVT DBF,

@AR”), stack manipulation instruction (“PUSH AR” or “POP AR”), indirect branch instruction (“BR @AR”), and indirect

subroutine call instruction (“CALL @AR”) has been executed.

A dedicated instruction (“INC AR”) that can increment the value of the address register by one is available.

The following paragraphs (1) through (5) describe the operations of the address register when each of these

instructions has been executed.

(1) Table reference instruction (“MOVT DBF, @AR”)

When the “MOVT DBF, @AR” instruction is executed, the constant data (16 bits) of the program memory

address specified by the contents of the address register are read to the data buffer.

The addresses of the constant data which can be specified by the address register are 0000H-0FFFH.

(2) Stack manipulation instruction (“PUSH AR”, “POP AR”)

By executing the “PUSH AR” instruction, the stack pointer is decremented by one and the contents of the

address register (AR) are stored to the address stack register specified by the stack pointer.

When the “POP AR” instruction is executed, the contents of the address stack register specified by the stack

pointer are transferred to the address register, and the stack pointer is incremented by one.

(3) Indirect branch instruction (“BR @AR”)

When the “BR @AR” instruction is executed, the program execution branches to a program memory address

specified by the contents of the address register.

The branch addresses that can be specified by the address register are 0000H-0FFFH.

(4) Indirect subroutine call instruction (“CALL @AR”)

When the “CALL @AR” instruction is executed, the subroutine at the program memory address specified by

the contents of the address register can be called.

The first addresses of the subroutine that can be specified by the address register are 0000H-0FFFH.

(5) Address register increment instruction (“INC AR”)

This instruction increments the contents of the address register by one each time it is executed.

Since the address register is configured of 12 bits, its contents become “0000H” when the “INC AR” instruction

is executed with the contents of the address register being “0FFFH”.

5.2.3 Address register and data buffer

The address register can transfer data through the data buffer as a part of the peripheral hardware.

For details, refer to 9. DATA BUFFER (DBF).

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