UPD16449 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

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UPD16449

SOURCE DRIVER FOR 240-OUTPUT TFT-LCD (NAVIGATION, AUTOMOBILE LCD-TV)

NEC => Renesas Technology 

µPD16449

5.2 Sample and Hold Circuit

The sample and hold circuit samples and holds the video input signals C1 through C3 selected by the multiplexer

circuit in the timing shown below. Swa1 through Swb2 are reset by the RESET signal and change at the rising and

falling edges of the INH signal (refer to 1. BLOCK DIAGRAM.).

RESET

Data undifined

undifined

INH

Swa1

ON

ON

Swa2

Swb1

Swb2

5.3 Write Operation Timing

The sampled video signals are written to the LCD panel by output currents IVOL and IVOH via output buffer. The

dynamic range is 4.3 V MIN. (VDD2 = 5.0 V).

While INH = H, do not stop shift clocks CLI1 through CLI3.

The output operation of this IC is controlled by INH signals.

INH = Hi-Z

INH = Connected with internal circuit (switch sample and hold circuit at the falling edge.)

Therefore, performing VCOM inversion while INH = L causes current flow to these IC output pins, which may result

in malfunction. Perform VCOM in version during INH = H (Hi-Z) and start output operation of the next line after the VCOM

signal is stable enough to operate. Make sure to evaluate this output operation sufficiently.

Data Sheet S15677EJ1V0DS

17

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