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CXD2027R View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
View to exact match
CXD2027R
Sony
Sony Semiconductor Sony
CXD2027R Datasheet PDF : 32 Pages
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CXD2027Q/R
Sub-address 04'H 00000100'B
BIT No.
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Name
DASLC
C1SL
LRSL
IIS
BLFS
FPCC
FPCB
TEST1
Description
External descramble I/F control
CC1 (control sign 1st bit) output polarity inversion
LRCK polarity inversion
H
L
Refer to page 20.
Inverted Positive
Inverted Positive
Audio output format switching
Selection of the number of front protection for frame sync protection and master
frame syncprotection selection
For testing (fix to low)
bit4
bit3
IIS
BLFS
Format
1
1
Prohibited
1
0
2) IIS
0
1
3) 64fs
0
0
1) SONY
bit2
FPCC
1
1
0
0
bit1
FPCB
1
0
1
0
The number of frame sync The number of master
front protection
frame sync front protection
3
7
5
9
7
11
9
11
Sub-address 07'H 00000111'B
BIT No.
bit3
Name
OTSL
Description
DTUP pin output signal switching
H
DED
L
CCUP
• Digital I/F BUS setting values
Sub-address 05'H 00000101'B
BIT No.
bit3
bit2
bit1
bit0
Name
C2
C10
XPRT
DOMU
Description
H
Digital copy allowed/prohibited selection
Allowed
Channel status 10th bit
General
Parity inversion selection for digital interface Transmission error
Mute for digital interface (TX is DC low)
ON
– 28 –
L
Prohibited
BS
Normal
OFF
 

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