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CXD2027R View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
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CXD2027R
Sony
Sony Semiconductor Sony
CXD2027R Datasheet PDF : 32 Pages
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CXD2027Q/R
• Control sign integration detection and 8th range bit integration detection
Integration detection is carried out in units of 15 frames. When a match of 12/15 or more is obtained, a
defined control sign is detected. However, updating is every 18 frames.
When a match of 12/15 or more is not obtained, the previous value is held.
Further, synchronizing to the master frame can be done when the master frame signal is being sent to the
control sign 14th bit.
After integration detection, the control sign and range bit can be read by the I2C bus.
• 10 14 bit data expansion
During A mode, the instantaneously compressed 10 bits of audio data are expanded to 14 bits according to
the range expansion rule. The lower bits of data are fixed at a set value during expansion, and the data is
treated as 16 bits.
• Upper bit majority detection
During B mode, this carries out upper bit majority detection and protects the upper bits.
• Mute signal generation
This performs muting by the external MUTE signal and internal logic, and also generates a mute signal
according to the mute setting from the I2C bus.
• Audio data interpolation
This receives the bit error detection signal and interpolation indication signal from majority detection, and
then carries out the average value interpolation or the previous value hold.
• Clock generation for D/A converter
This generates the clock for the DAC.
• Digital filter (DF) and de-emphasis
A 2ch 1-bit DAC with 2nd-order ∆∑ format noise shaper of quadruple oversampling filter is built in.
The output format is differential.
De-emphasis function corresponding to the mode is also built in.
• Audio interface
One of the following three output formats can be selected.
1) SONY: bit clock 32 fs/ MSB first/ 16 bits (for built-in D/A converter)
2) IIS: SONY format 1 BCLK delay
3) Bit clock 64fs / MSB first / 16 bits rearward truncation
• Digital interface
Conforms to the following digital audio interface format: type II form I (for consumer digital audio equipment)
• I2C bus interface
Control by microcomputer is carried out by the I2C bus I/F.
The slave address can be switched by controlling SASL; for low: D4, for high: D6.
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