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UBA2021P View Datasheet(PDF) - Philips Electronics

Part Name
Description
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UBA2021P
Philips
Philips Electronics Philips
UBA2021P Datasheet PDF : 20 Pages
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Philips Semiconductors
630 V driver IC for CFL and TL lamps
Product specification
UBA2021
IC supply
Initially, the IC is supplied from Vin by the current through
RRHV. This current charges the supply capacitor CS9 via
an internal diode. As soon as VVS exceeds VVS(start), the
circuit starts oscillating. After the preheat phase is finished,
pin RHV is connected to an internal resistor Ri(RHV); prior
to this, pin RHV is internally connected to pin VS. The
voltage level at pin RHV thus drops from VVS + Vdiode to
IRHV × Ri(RHV). The capacitor CS9 at pin VS will now be
charged via the snubber capacitor CS7. Excess charge is
drained by an internal clamp that turns on at voltage
VVS(clamp).
Minimum gate-source voltage of T1 and T2
The high side driver is supplied via capacitor Cboot.
Capacitor Cboot is charged via the bootstrap switch during
the on-periods of T2. The IC stops oscillating at a voltage
level VVS(stop). Given a maximum charge consumption on
the load at pin G1 of 1 nC/V, this safeguards the minimum
drive voltages V(G1S1) for the high side driver; see
Table 1.
Ground pins
Pin PGND is the ground reference of the IC with respect to
the application. As an exception, pin SGND provides a
local ground reference for the components connected to
pins CP, CI, RREF and CF. For this purpose pins PGND
and SGND are short-circuited internally. External
connection of pins PGND and SGND is not preferred. The
sum of currents flowing out of the pins CP, CI, RREF, CF
and SGND must remain zero at any time.
Charge coupling
Due to parasitic capacitive coupling to the high voltage
circuitry, all pins are burdened with a repetitive charge
injection. Given the typical application in Fig.7, pins RREF
and CF are sensitive to this charge injection. For the rating
Qcouple a safe functional operation of the IC is guaranteed,
independent of the current level. Charge coupling at
current levels below 50 µA will not interfere with the
accuracy of the VRS(cap) and VRS(ctrl) levels. Charge
coupling at current levels below 20 µA will not interfere
with the accuracy of any parameter.
Table 1 Minimum gate-source voltages
FREQUENCY
<75 kHz
75 kHz to 85 kHz
85 kHz
VOLTAGE
8 V (min.)
7 V (min.)
6 V (min.)
The drive voltage at G2 will exceed the drive voltage of the
high side driver.
Frequency and change in frequency
At any point in time during oscillation, the circuit will
operate between fB and fstart. Any change in frequency will
be gradual, no steps in frequency will occur. Changes in
frequency caused by a change in voltage at pin CI show a
rather-constant df/dt over the entire frequency range. The
following rates are realised (at a frequency of 85 kHz and
with a 100 nF capacitor connected to pin CI):
For any increase in frequency: df/dt is between
15 and 37.5 kHz/ms
During preheat and normal operation: df/dt for a
decrease in frequency is between 6 and 15 kHz/ms
During the ignition phase: df/dt for a decrease in
frequency is between 150 and 375 Hz/ms.
2002 Aug 02
7
 

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