Philips Semiconductors
2.5 Gbits/s dual postamplifier with level
detectors and 2 × 2 switch
Preliminary specification
TZA3019
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
VEE
Vn
In
Ptot
Tstg
Tj
Tamb
PARAMETER
MIN.
negative supply voltage
−5.5
DC voltage
pins IN1, IN1Q, IN2, IN2Q, LOSTH1, LOSTH2, LEVEL1, LEVEL2, VEE − 0.5
Vref, TEST, OUT2Q, OUT2, OUT1Q, OUT1, VEEP, GND1A,
GND2A, GND1B and GND2B
pins LOS1, LOS2, INV1, INV2, S1 and S2
DC current
VEE − 0.5
pins IN1, IN1Q, IN2 and IN2Q
−20
pins LOSTH1, LOSTH2, LEVEL1 and LEVEL2
0
pins Vref, TEST, LOS1 and LOS2
−1
pins OUT1, OUT1Q, OUT2 and OUT2Q
−30
pins INV1, INV2, S1 and S2
0
total power dissipation
−
storage temperature
−65
junction temperature
−
ambient temperature
−40
MAX.
+0.5
0.5
VEE + 7
+20
14
+1
+30
20
1.2
+150
150
+85
UNIT
V
V
V
mA
µA
mA
mA
µA
W
°C
°C
°C
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-s)
Rth(j-a)
Rth(s-a)
Rth(s-a)(req)
PARAMETER
CONDITIONS
thermal resistance from junction to
solder point (exposed die pad); note 1
thermal resistance from junction to
ambient; note 1
1s2p multi-layer test board
thermal resistance from solder point to 1s2p multi-layer test board
ambient (exposed die pad); note 1
required thermal resistance from
solder point to ambient
LOS circuits switched on
Vo = 200 mV (p-p) single-ended;
both output circuits
Vo = 800 mV (p-p) single-ended;
both output circuits
Note
1. JEDEC standard.
VALUE
15
33
18
UNIT
K/W
K/W
K/W
60
K/W
30
K/W
2000 Apr 10
15