RF5C296/RF5C396L/RB5C396/RF5C396
Slot#0
offset
+1Fh
+20h
+21h
+22h
+23h
+24h
+25h
+26h
+27h
+28h
+29h
+2Ah
+2Bh
+2Ch
+2Dh
+2Eh
+2Fh
+30h
+31h
+32h
+33h
+34h
+35h
+36h
+37h
+38h
+39h
+3Ah
+3Bh
Slot#1
offset
+5Fh
+60h
+61h
+62h
+63h
+64h
+65h
+66h
+67h
+68h
+69h
+6Ah
+6Bh
+6Ch
+6Dh
+6Eh
+6Fh
+70h
+71h
+72h
+73h
+74h
+75h
+76h
+77h
+78h
+79h
+7Ah
+7Bh
Register Name
Mode Control 1
System Memory Address 2 Mapping Start Low Byte
System Memory Address 2 Mapping Start High Byte
System Memory Address 2 Mapping Stop Low Byte
System Memory Address 2 Mapping Stop High Byte
Card Memory Offset Address 2 Low Byte
Card Memory Offset Address 2 High Byte
Reserved
Reserved
System Memory Address 3 Mapping Start Low Byte
System Memory Address 3 Mapping Start High Byte
System Memory Address 3 Mapping Stop Low Byte
System Memory Address 3 Mapping Stop High Byte
Card Memory Offset Address 3 Low Byte
Card Memory Offset Address 3 High Byte
Reserved
Mode Control 2
System Memory Address 4 Mapping Start Low Byte
System Memory Address 4 Mapping Start High Byte
System Memory Address 4 Mapping Stop Low Byte
System Memory Address 4 Mapping Stop High Byte
Card Memory Offset Address 4 Low Byte
Card Memory Offset Address 4 High Byte
Card I/O Offset Address 0 Low Byte
Card I/O Offset Address 0 High Byte
Card I/O Offset Address 1 Low Byte
Card I/O Offset Address 1 High Byte
Chip Identification
Mode Control 3
*) Chip Identification Register bit7 is read back “0” from RF5C296, “1” from RF5C396.
Default Value
7654 to 3210
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
´011 0010*
0000 0000
45