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TS68040VFT1U35A View Datasheet(PDF) - Atmel Corporation

Part NameTS68040VFT1U35A Atmel
Atmel Corporation Atmel
DescriptionThird-Generation 32-bit Microprocessor
TS68040VFT1U35A Datasheet PDF : 49 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Assignments
PGA 179
Figure 2. Bottom View
Table 1. Power Supply Affectation to PGA Body
Internal Logic
C6, C7, C9, C11,C13, K3, K16, L3, M16, R4, R11, R13,
S10, T4, S9, R6, R10
Output Drivers
B2, B4, B6, B8, B10, B13, B15, B17, D2, D17, F2, F17,
H2, H17, L2, L17, N2, N17, Q2, Q17, S2, S15, S17
C5, C8, C10, C12, C14, H3, H16, J3, J16, L16, M3, R5,
R12, R8
B5, B9, B14, C2, C17, G2, G17, M2, M17, R2, R17,
4 TS68040
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The TS68040 is Atmel’s third generation of 68000-compatible, high-performance, 32-bit microprocessors. The TS68040 is a virtual memory microprocessor employing multiple, concurrent execution units and a highly integrated architecture to provide very high performance in a monolithic HCMOS device.

• 26-42 MIPS Integer Performance
• 3.5-5.6 MFLOPS Floating-Point-Performance
• IEEE 754-Compatible FPU
• Independent Instruction and Data MMUs
• 4K bytes Physical Instruction Cache and 4K bytes Physical Data Cache Accessed Simultaneously
• 32-bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
• User-Object-Code Compatibility with All Earlier TS68000 Microprocessors
• Multimaster/Multiprocessor Support via Bus Snooping
• Concurrent Integer Unit, FPU, MMU, Bus Controller, and Bus Snooper Maximize Throughput
• 4G bytes Direct Addressing Range
• Software Support Including Optimizing C Compiler and UNIX® System V Port
• IEEE P 1149-1 Test Mode (JTAG)
• f = 25 MHz, 33 MHz; VCC = 5V ± 5%; PD = 7W
• The Use of the TS88915T Clock Driver is Suggested


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