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TS68040VF1D/T35A View Datasheet(PDF) - Atmel Corporation

Part NameDescriptionManufacturer
TS68040VF1D/T35A Third-Generation 32-bit Microprocessor Atmel
Atmel Corporation Atmel
TS68040VF1D/T35A Datasheet PDF : 49 Pages
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TS68040
Table 19. Addressing Modes
Addressing Modes
Syntax
Register Direct
Date Register Direct
Dn
Address Register Direct
An
Register Indirect
Address Register Indirect
Address Register Indirect With Postincrement
Address Register Indirect With Predecrement
Address Register Indirect With Displacement
Register Indirect With Index
Address Register Indirect With Index (8-bit Displacement)
Address Register Indirect With Index (Base Displacement)
(An)
(An)
(An)
(d16, An)
(d8, An, Xn)
(bd, An, Xn)
Memory Indirect
Memory Indirect Postincrement
Memory Indirect Preindexed
([bd, An], Xn, od)
([bd, An, Xn], od)
Program Counter Indirect With Displacement
Program Counter Indirect With Index
PC Indirect With Index (8-bit Displacement)
PC Indirect With Index (Base Displacement
(d16, PC)
(d8, PC, Xn)
(bd, PC, Xn)
Program Counter Memory Indirect
PC Memory Indirect Postindexed
PC Memory Indirect Preindexed
([bd, PC], Xn, od)
([bd, PC, Xn], od)
Absolute
Absolute Short
Absolute Long
xxx.W
xxx.L
Immediate
Note:
DN =
AN =
d8, d16 =
Xn =
bd =
od =
PC =
(data) =
() =
[] =
# (data)
Data register, D0-D7
Address register, A0-A7
A twos-complement or sign-extended displacement; added as part of the effective address calculation;
size is 8 (d8) or 16 (d16) bits; when omitted, assemblers use a value of zero.
Address or data register used as an index register; form is Xn, SIZE*SCALE, where SIZE is W or L
(indicates index register size) and SCALE is 1, 2, 4 or 8 (index register os multiplied by SCALE); use of
SIZE and or SCALE is optional.
A twos-complement base displacement; when present, size can be 16 or 32 bits.
Outer displacement added as part of effective address calculation after any memory indirection; use is
optional with a size of 16 or 32 bits.
Program counter.
Immediate value of 8, 16 or 32 bits.
Effective address.
Used as indirect address to long-word address.
– Instruction Set Overview
33
2116A–HIREL–09/02
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