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TS68040MR1U25A View Datasheet(PDF) - Atmel Corporation

Part NameTS68040MR1U25A Atmel
Atmel Corporation Atmel
DescriptionThird-Generation 32-bit Microprocessor
TS68040MR1U25A Datasheet PDF : 49 Pages
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Table 19. Addressing Modes
Addressing Modes
Register Direct
Date Register Direct
Address Register Direct
Register Indirect
Address Register Indirect
Address Register Indirect With Postincrement
Address Register Indirect With Predecrement
Address Register Indirect With Displacement
Register Indirect With Index
Address Register Indirect With Index (8-bit Displacement)
Address Register Indirect With Index (Base Displacement)
(d16, An)
(d8, An, Xn)
(bd, An, Xn)
Memory Indirect
Memory Indirect Postincrement
Memory Indirect Preindexed
([bd, An], Xn, od)
([bd, An, Xn], od)
Program Counter Indirect With Displacement
Program Counter Indirect With Index
PC Indirect With Index (8-bit Displacement)
PC Indirect With Index (Base Displacement
(d16, PC)
(d8, PC, Xn)
(bd, PC, Xn)
Program Counter Memory Indirect
PC Memory Indirect Postindexed
PC Memory Indirect Preindexed
([bd, PC], Xn, od)
([bd, PC, Xn], od)
Absolute Short
Absolute Long
DN =
AN =
d8, d16 =
Xn =
bd =
od =
PC =
(data) =
() =
[] =
# (data)
Data register, D0-D7
Address register, A0-A7
A twos-complement or sign-extended displacement; added as part of the effective address calculation;
size is 8 (d8) or 16 (d16) bits; when omitted, assemblers use a value of zero.
Address or data register used as an index register; form is Xn, SIZE*SCALE, where SIZE is W or L
(indicates index register size) and SCALE is 1, 2, 4 or 8 (index register os multiplied by SCALE); use of
SIZE and or SCALE is optional.
A twos-complement base displacement; when present, size can be 16 or 32 bits.
Outer displacement added as part of effective address calculation after any memory indirection; use is
optional with a size of 16 or 32 bits.
Program counter.
Immediate value of 8, 16 or 32 bits.
Effective address.
Used as indirect address to long-word address.
– Instruction Set Overview
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The TS68040 is Atmel’s third generation of 68000-compatible, high-performance, 32-bit microprocessors. The TS68040 is a virtual memory microprocessor employing multiple, concurrent execution units and a highly integrated architecture to provide very high performance in a monolithic HCMOS device.

• 26-42 MIPS Integer Performance
• 3.5-5.6 MFLOPS Floating-Point-Performance
• IEEE 754-Compatible FPU
• Independent Instruction and Data MMUs
• 4K bytes Physical Instruction Cache and 4K bytes Physical Data Cache Accessed Simultaneously
• 32-bit, Nonmultiplexed External Address and Data Buses with Synchronous Interface
• User-Object-Code Compatibility with All Earlier TS68000 Microprocessors
• Multimaster/Multiprocessor Support via Bus Snooping
• Concurrent Integer Unit, FPU, MMU, Bus Controller, and Bus Snooper Maximize Throughput
• 4G bytes Direct Addressing Range
• Software Support Including Optimizing C Compiler and UNIX® System V Port
• IEEE P 1149-1 Test Mode (JTAG)
• f = 25 MHz, 33 MHz; VCC = 5V ± 5%; PD = 7W
• The Use of the TS88915T Clock Driver is Suggested


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