|TS68020MF20||HCMOS 32-bit Virtual Memory Microprocessor|
|TS68020MF20 Datasheet PDF : 45 Pages |
The micromachine consists of an execution unit, nanorom and microrom storage, an
instruction decoder, an instruction pipe, and associated control sections. The execution
unit consists of an address section, an operand address section, and a data section.
Microcode control is provided by a modified two-level store of microrom and nanorom.
Programmed logical arrays (PLAs) are used to provide instruction decode and sequenc-
ing information. The instruction pipe and other individual control sections provide the
secondary decode of instructions and generated the actual control signals that result in
the decoding and interpretation of nanorom and micorom information.
Figure 2. PGA Terminal Designation
Figure 3. CQFP Terminal Designation
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