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TS68020DESC02XA View Datasheet(PDF) - Atmel Corporation

Part NameTS68020DESC02XA Atmel
Atmel Corporation Atmel
DescriptionHCMOS 32-bit Virtual Memory Microprocessor
TS68020DESC02XA Datasheet PDF : 45 Pages
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TS68020
Other microprocessors in the TS68000 Family can operate any TS68000 co-processor
even though they may not have the hardware implementation of the co-processor inter-
face as does the TS68020. Since the co-processor is operated through the co-
processor interface registers which are accessed via normal asynchronous bus cycles,
the co-processor may be used as a peripheral device. Software easily emulates the
communication protocol by addressing the co-processor interface registers appropri-
ately and passing the necessary commands and operands required by the co-
processor.
The co-processor interface registers are implemented by the co-processor in addition to
those registers implemented as extensions to the TS68020 programmer’s model. For
example, the TS68881 implements the co-processor interface registers shown in Table
10 and the registers in the programming model, including eight 80-bit floating-point data
registers and three 32-bit control/status registers used by the TS68881 programmer.
Table 10. Co-processor Interface Registers
Register
Function
R/W
Response
Requests Action from CPU
R
Control
CPU
W
Save
Initiate Save of Internal State
R
Restore
Initiate Restore of Internal State
R/W
Operation Word
Current Co-processor Instruction
W
Command Word
Co-processor Specific Command
W
Condition Word
Condition to be Evaluated
W
Operand
32-bit Operand
R/W
Register Select
Specifies CPU Register or Mask
R
Instruction Address
Pointer to Co-processor Instruction
R/W
Operand Address
Pointer to Co-processor Operand
R/W
Table 11. Co-processor Primitives
Processor Synchronization
Busy with Current Instruction
Proceed with Next Instruction, If No Trace
Service Interrupts and Re-query, If Trace Enable
Proceed with Execution, Condition True/False
Instruction Manipulation
Transfer Operation Word
Transfer Words from Instruction Stream
Exception Handling
Take Privilege Violation if S Bit Not Set
Take Pre-Instruction Exception
Take Mid-Instruction Exception
Take Post-Instruction Exception
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2115A–HIREL–07/02
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Description
The TS68020 is the first full 32-bit implementation of the TS68000 family of microprocessors. Using HCMOS technology, the TS68020 is implemented with 32-bit registers and data paths, 32-bit addresses, a rich instruction set, and versatile addressing modes.

Features
• Object Code Compatible with Earlier TS68000 Microprocessors
• Addressing Mode Extensions for Enhanced Support of High Level Languages
• New Bit Field Data Type Accelerates Bit-oriented Application, i.e. Video Graphics
• Fast on-chip Instruction Cache Speed Instructions and Improves Bus Bandwidth
• Co-processor Interface to Companion 32-bit Peripherals: TS68881 and TS68882 Floating Point Co-processors
• Pipelined Architecture with High Degree of Internal Parallelism Allowing Multiple Instructions to be Executed Concurrently
• High Performance Asynchronous Bus in Non-multiplexed and Full 32 Bits
• Dynamic Bus Sizing Efficiently Supports 8-, 16-, 32-bit Memories and Peripherals
• Full Support of Virtual Memory and Virtual Machine
• Sixteen 32-bit General-purpose Data and Address Registers
• Two 32-bit Supervisor Stack Pointers and 5 Special Purpose Control Registers
• 18 Addressing Modes and 7 Data Types
• 4-Gbyte Direct Addressing Range
• Processor Speed: 16.67 MHz - 20 MHz - 25 MHz
• Power Supply: 5.0 VDC ± 10%

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