datasheetbank_Logo    Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
Part Name :

TS68020DESC02XA View Datasheet(PDF) - Atmel Corporation

Part NameTS68020DESC02XA Atmel
Atmel Corporation Atmel
DescriptionHCMOS 32-bit Virtual Memory Microprocessor
TS68020DESC02XA Datasheet PDF : 45 Pages
First Prev 21 22 23 24 25 26 27 28 29 30 Next Last
The TS68000 Family processors distinguish address spaces as supervisor / used and
program/data. These four combinations are specified by the function code pins
(FC0/FC1/FC2) during bus cycles, indication the particular address space. Using the
function codes, the memory sub-system can distinguish between authorized access
(supervisor mode is privileged access) and unauthorized access (user mode may not
have access to supervisor program or data areas). To support the full privileges of the
supervisor, the alternate function code registers allow the supervisor to specify an
access to user program or data areas by preloading the SFC/DFC registers
appropriately.
The cache registers (control — CACR, address — CAAR) allow software manipulation
of the on-chip instruction cache. Control and status accesses to the instruction cache
are provided by the cache control register (CACR), while the cache address register
(CAAR) holds the address for those cache control functions that require an address.
Figure 19. User Programming Model
24 TS68020
2115A–HIREL–07/02
Direct download click here
 

Description
The TS68020 is the first full 32-bit implementation of the TS68000 family of microprocessors. Using HCMOS technology, the TS68020 is implemented with 32-bit registers and data paths, 32-bit addresses, a rich instruction set, and versatile addressing modes.

Features
• Object Code Compatible with Earlier TS68000 Microprocessors
• Addressing Mode Extensions for Enhanced Support of High Level Languages
• New Bit Field Data Type Accelerates Bit-oriented Application, i.e. Video Graphics
• Fast on-chip Instruction Cache Speed Instructions and Improves Bus Bandwidth
• Co-processor Interface to Companion 32-bit Peripherals: TS68881 and TS68882 Floating Point Co-processors
• Pipelined Architecture with High Degree of Internal Parallelism Allowing Multiple Instructions to be Executed Concurrently
• High Performance Asynchronous Bus in Non-multiplexed and Full 32 Bits
• Dynamic Bus Sizing Efficiently Supports 8-, 16-, 32-bit Memories and Peripherals
• Full Support of Virtual Memory and Virtual Machine
• Sixteen 32-bit General-purpose Data and Address Registers
• Two 32-bit Supervisor Stack Pointers and 5 Special Purpose Control Registers
• 18 Addressing Modes and 7 Data Types
• 4-Gbyte Direct Addressing Range
• Processor Speed: 16.67 MHz - 20 MHz - 25 MHz
• Power Supply: 5.0 VDC ± 10%

Share Link : Atmel
@ 2014 - 2018  [ Home ] [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]