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YA018 View Datasheet(PDF) - Texas Instruments

Part NameYA018 TI
Texas Instruments TI
Description10-Ω QUAD SPDT ANALOG SWITCH
YA018 Datasheet PDF : 19 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
TS3A5018
10ĆW QUAD SPDT ANALOG SWITCH
www.ti.com
SCDS189 – JANUARY 2005
Electrical Characteristics for 3.3-V Supply(1)
V+ = 3 V to 3.6 V, TA = −40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL
TEST CONDITIONS
TA
V+
Analog Switch
Analog signal
range
ON-state
resistance
VCOM,
VNC, VNO
ron
0 (VNC or VNO) V+,
ICOM = −32 mA,
Switch ON,
25°C
See Figure 13 Full
3V
ON-state
resistance match
between
channels
ron
VNC or VNO = 2.1 V,
ICOM = −32 mA,
25°C
Switch ON,
See Figure 13
3V
Full
MIN TYP MAX UNIT
0
V+ V
7
10
12
0.3 0.8
1
ON-state
resistance
flatness
ron(flat)
0 (VNC or VNO) V+,
ICOM = −32 mA,
Switch ON,
25°C
See Figure 13 Full
3V
5
7
8
NC, NO
OFF leakage
current
INC(OFF)
INO(OFF)
VNC or VNO = 1 V, VCOM = 3 V,
or
VNC or VNO = 3 V, VCOM = 1 V,
VNC or VNO = 0 to 3.6 V,
VCOM = 3.6 V to 0,
or
VNC or VNO = 3.6 V to 0,
VCOM = 0 to 3.6 V,
Switch OFF,
See Figure 14
25°C
Full
Switch OFF,
See Figure 14
25°C
Full
3.6 V
0V
−0.1 0.05
−0.2
−2 0.05
0.1
0.2
2 µA
−10
10
COM
OFF leakage
current
ICOM(OFF)
VCOM = 1 V, VNC or VNO = 3 V,
or
VCOM = 3 V, VNC or VNO = 3 V,
VCOM = 0 to 3.6 V, VNC or
VNO = 3.6 V to 0,
or
VCOM = 3.6 V to 0, VNC or
VNO = 0 to 3.6 V,
Switch OFF,
See Figure 14
25°C
Full
Switch OFF,
See Figure 14
25°C
Full
3.6 V
0V
−0.1 0.05
−0.2
−2 0.05
0.1
0.2
2 µA
−10
10
NC, NO
ON leakage
current
INC(ON)
INO(ON)
VNC or VNO = 1 V, VCOM = Open,
or
VNC or VNO = 3 V, VCOM = Open,
Switch ON,
See Figure 15
25°C
Full
3.6 V
−0.1 0.05
−0.2
0.1
µA
0.2
COM
ON leakage
current
VCOM = 1 V, VNC or VNO = Open,
ICOM(ON)
or
VCOM = 3 V, VNC or VNO = Open,
Digital Control Inputs (IN, EN)(2)
Switch ON,
See Figure 15
25°C
Full
3.6 V
−0.1 0.05
−0.2
0.1
µA
0.2
Input logic high
VIH
Full
2
V+ V
Input logic low
VIL
Full
0
0.8 V
Input leakage
current
IIH, IIL VI = 5.5 V or 0
25°C
Full
3.6 V
−1 0.05
−1
1
µA
1
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications
of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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Description
The TS3A5018 is a quad single-pole double-throw (SPDT) analog switch that is designed to operate from
2.3 V to 3.6 V. This device can handle both digital and analog signals, and signals up to V+can be transmitted in either direction.

Features
Low ON-State Resistance (10 Ω)
Low Charge Injection
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion (THD)
2.3-V to 3.6-V Single-Supply Operation
Control Inputs are 5-V Tolerant
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model (A114-B, Class II)
− 1000-V Charged-Device Model (C101)

Applications
Sample-and-Hold Circuit
Battery-Powered Equipment
Audio and Video Signal Routing
Communication Circuits

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