SLVSB30B – SEPTEMBER 2011 – REVISED AUGUST 2013
If a delayed start-up is required on any of the buck converters fit a ceramic capacitor to the ENx pins. The delay
added is ~1.67 ms per nF connected to the pin. Note that the EN pins have a weak 1-MΩ pull-up to the 3V3 rail.
Enx rise time
dictated by CEN
200mS 1024 mS
All bucks are disabled
Soft star rise time
dictated by C SS
Soft start timer
Figure 33. Delayed Start-Up
In order to reduce input ripple current, Buck1 and Buck2 operate 180° out-of-phase. This enables the system
having less input ripple, then to lower component cost, save board space and reduce EMI.
Adjusting the Output Voltage
The output voltage is set with a resistor divider from the output node to the FB pin. It is recommended to use 1%
tolerance or better divider resistors. In order to improve efficiency at light load, start with a value close to 40 kΩ
for the R1 resistor and use Equation 8 to calculate R2.
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